5秒后页面跳转
捷配首页

Datasheet > SN65LVDS32NS
SN65LVDS32NS PDF预览

SN65LVDS32NS

更新时间： 2024-01-17 03:38:49
品牌 Logo 应用领域
德州仪器 - TI 光电二极管接口集成电路
页数 文件大小 规格书
39页 1408K
描述
QUAD LINE RECEIVER, PDSO16, SOP-16

阅读下载

中文翻译

获取价格

SN65LVDS32NS 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：SOP,针数：16
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：1.87输入特性：DIFFERENTIAL
接口集成电路类型：LINE RECEIVER接口标准：EIA-644; TIA-644
JESD-30 代码：R-PDSO-G16JESD-609代码：e4
长度：10.2 mm湿度敏感等级：1
功能数量：4端子数量：16
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：260认证状态：Not Qualified
最大接收延迟：3 ns接收器位数：4
座面最大高度：2 mm最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
表面贴装：YES温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：5.3 mm
Base Number Matches：1

SN65LVDS32NS 数据手册

 浏览型号SN65LVDS32NS的Datasheet PDF文件第2页浏览型号SN65LVDS32NS的Datasheet PDF文件第3页浏览型号SN65LVDS32NS的Datasheet PDF文件第4页浏览型号SN65LVDS32NS的Datasheet PDF文件第5页浏览型号SN65LVDS32NS的Datasheet PDF文件第6页浏览型号SN65LVDS32NS的Datasheet PDF文件第7页 
SN55LVDS32, SN65LVDS32  
SN65LVDS3486, SN65LVDS9637  
www.ti.com  
SLLS262Q–JULY 1997–REVISED JULY 2007  
HIGH-SPEED DIFFERENTIAL LINE RECEIVERS  
FEATURES  
SN55LVDS32 . . . J OR W  
SN65LVDS32 . . . D OR PW  
(Marked as LVDS32 or 65LVDS32)  
(TOP VIEW)  
•
Meet or Exceed the Requirements of ANSI  
TIA/EIA-644 Standard  
•
•
Operate With a Single 3.3-V Supply  
1B  
1A  
1Y  
VCC  
4B  
4A  
4Y  
G
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
Designed for Signaling Rates of up to 100  
Mbps (See Table 1)  
•
•
•
Differential Input Thresholds ±100 mV Max  
G
2Y  
Typical Propagation Delay Time of 2.1 ns  
2A  
11 3Y  
Power Dissipation 60 mW Typical Per  
Receiver at Maximum Data Rate  
10  
9
2B  
GND  
3A  
3B  
•
•
•
Bus-Terminal ESD Protection Exceeds 8 kV  
Low-Voltage TTL (LVTTL) Logic Output Levels  
SN55LVDS32FK  
(TOP VIEW)  
Pin Compatible With AM26LS32, MC3486, and  
μA9637  
•
•
Open-Circuit Fail-Safe  
3
4
2
1
20 19  
Cold Sparing for Space and High Reliability  
Applications Requiring Redundancy  
1Y  
G
4A  
4Y  
NC  
G
18  
17  
16  
15  
14  
5
6
7
NC  
2Y  
2A  
DESCRIPTION  
The SN55LVDS32, SN65LVDS32, SN65LVDS3486,  
and SN65LVDS9637 are differential line receivers  
that implement the electrical characteristics of  
low-voltage differential signaling (LVDS). This  
signaling technique lowers the output voltage levels  
of 5-V differential standard levels (such as  
EIA/TIA-422B) to reduce the power, increase the  
switching speeds, and allow operation with a 3.3-V  
supply rail. Any of the four differential receivers  
provides a valid logical output state with a ±100-mV  
differential  
common-mode  
common-mode voltage range allows 1 V of ground  
potential difference between two LVDS nodes.  
3Y  
8
9
10 11 12 13  
SN65LVDS3486D (Marked as LVDS3486)  
(TOP VIEW)  
1B  
1A  
1Y  
VCC  
4B  
4A  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
input  
voltage  
voltage  
within  
range.  
the  
The  
input  
input  
1,2EN  
2Y  
4Y  
3,4EN  
3Y  
2A  
2B  
GND  
10 3A  
3B  
The intended application of these devices and  
signaling technique is both point-to-point and  
multidrop (one driver and multiple receivers) data  
transmission over controlled impedance media of  
approximately 100 Ω. The transmission media may  
be printed-circuit board traces, backplanes, or  
cables. The ultimate rate and distance ofdata  
transfer depends on the attenuation characteristics of  
the media and the noise coupling to the environment.  
9
SN65LVDS9637D (Marked as DK637 or LVDS37)  
SN65LVDS9637DGN (Marked as L37)  
SN65LVDS9637DGK (Marked as AXF)  
(TOP VIEW)  
VCC  
1Y  
2Y  
1A  
1B  
2A  
2B  
1
2
3
4
8
7
6
5
GND  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PowerPAD is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1997–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...39

中文翻译

下载PDF

SN65LVDS32NS 替代型号

型号 品牌 替代类型 描述 数据表
DS90LV048ATMTC/NOPB TI

完全替代

 3-V LVDS Quad CMOS Differential Line Receiver
SN65LVDS32NSR TI

完全替代

 HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
AM26LS31CN TI

功能相似

 QUADRUPLE DIFFERENTIAL LINE DRIVER

与SN65LVDS32NS相关器件

型号 品牌 获取价格 描述 数据表
SN65LVDS32NSR TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS32NSRG4 TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS32PW TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS32PWG4 TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS32PWR TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS32PWRG4 TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS33 TI

获取价格

 		HIGH SPEED DIFFERENTIAL RECEIVERS
SN65LVDS33_07 TI

获取价格

 		HIGH-SPEED DIFFERENTIAL RECEIVERS
SN65LVDS33D TI

获取价格

 		HIGH-SPEED DIFFERENTIAL RECEIVERS
SN65LVDS33DG4 TI

获取价格

 		HIGH-SPEED DIFFERENTIAL RECEIVERS

与SN65LVDS32NS相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证