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SN65LVDS33MDREP PDF预览

SN65LVDS33MDREP

更新时间: 2024-11-18 12:21:47
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
23页 618K
描述
HIGH-SPEED DIFFERENTIAL RECEIVER

SN65LVDS33MDREP 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:1Samacsys Description:Enhanced Product High Speed Differential Receivers
差分输出:NO高电平输入电流最大值:0.000012 A
输入特性:DIFFERENTIAL SCHMITT TRIGGER接口集成电路类型:LINE RECEIVER
接口标准:EIA-644; TIA-644JESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:9.9 mm
湿度敏感等级:1功能数量:4
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出特性:TOTEM-POLE
最大输出低电流:0.004 A输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
最大接收延迟:8 ns接收器位数:4
座面最大高度:1.75 mm子类别:Line Driver or Receivers
最大压摆率:25 mA最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
电源电压1-最大:3.6 V电源电压1-分钟:3 V
电源电压1-Nom:3.3 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm

SN65LVDS33MDREP 数据手册

 浏览型号SN65LVDS33MDREP的Datasheet PDF文件第2页浏览型号SN65LVDS33MDREP的Datasheet PDF文件第3页浏览型号SN65LVDS33MDREP的Datasheet PDF文件第4页浏览型号SN65LVDS33MDREP的Datasheet PDF文件第5页浏览型号SN65LVDS33MDREP的Datasheet PDF文件第6页浏览型号SN65LVDS33MDREP的Datasheet PDF文件第7页 
SN65LVDS33-EP, SN65LVDT33-EP  
www.ti.com  
SGLS309BJUNE 2005REVISED APRIL 2007  
HIGH-SPEED DIFFERENTIAL RECEIVER  
FEATURES  
TTL Inputs Are 5-V Tolerant  
Controlled Baseline – One Assembly/Test  
Site, One Fabrication Site  
Pin-Compatible With the AM26LS32,  
SN65LVDS32B, µA9637, SN65LVDS9637B  
Extended Temperature Performance of Up to  
–55°C to 125°C  
DESCRIPTION  
Enhanced Diminishing Manufacturing Sources  
(DMS) Support  
This family of four LVDS data line receivers offers  
the widest common-mode input voltage range in the  
industry. These receivers provide an input voltage  
range specification compatible with a 5-V PECL  
signal as well as an overall increased ground-noise  
tolerance. They are in industry standard footprints  
with integrated termination as an option.  
Enhanced Product-Change Notification  
(1)  
Qualification Pedigree  
400-Mbps Signaling Rate (2) and 200-Mxfr/s  
Data Transfer Rate  
Operates With a Single 3.3-V Supply  
Precise control of the differential input voltage  
thresholds allows for inclusion of 50 mV of input  
voltage hysteresis to improve noise rejection on  
slowly changing input signals. The input thresholds  
are still no more than +50 mV over the full input  
common-mode voltage range.  
–4 V to 5 V Common-Mode Input Voltage  
Range  
Differential Input Thresholds < ±50 mV With  
50 mV of Hysteresis Over Entire  
Common-Mode Input Voltage Range  
Integrated 110-Line Termination Resistors  
On LVDT Products  
Complies With TIA/EIA-644 (LVDS)  
Active Failsafe Assures a High-Level Output  
With No Input  
Bus-Pin ESD Protection Exceeds 15-kV HBM  
Input Remains High-Impedance On Power  
Down  
(1) Component qualification in accordance with JEDEC and  
industry standards to ensure reliable operation over an  
extended temperature range. This includes, but is not limited  
to, Highly Accelerated Stress Test (HAST) or biased 85/85,  
temperature cycle, autoclave or unbiased HAST,  
electromigration, bond intermetallic life, and mold compound  
life. Such qualification testing should not be viewed as  
justifying use of this component beyond specified  
performance and environmental limits.  
(2) The signaling rate of a line is the number of voltage  
transitions that are made per second expressed in the units  
bps (bits per second).  
ORDERING INFORMATION(1)  
TA  
PACKAGE(2)  
Reel of 2500  
Reel of 2500  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING  
LVDS33M  
SOIC - D  
SOIC - D  
SN65LVDS33MDREP  
SN65LVDT33MDREP(3)  
–55°C to 125°C  
LVDT33M  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
website at www.ti.com.  
(2) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
(3) Product Preview  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
UNLESS OTHERWISE NOTED this document contains  
Copyright © 2005–2007, Texas Instruments Incorporated  
PRODUCTION DATA information current as of publication date.  
Products conform to specifications per the terms of Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

SN65LVDS33MDREP 替代型号

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