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SN54LVTH162244WD PDF预览

SN54LVTH162244WD

更新时间: 2024-11-24 22:15:23
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
15页 476K
描述
3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

SN54LVTH162244WD 技术参数

生命周期:Obsolete零件包装代码:DFP
包装说明:DFP,针数:48
Reach Compliance Code:unknown风险等级:5.21
系列:LVTJESD-30 代码:R-GDFP-F48
长度:15.748 mm逻辑集成电路类型:BUS DRIVER
位数:4功能数量:4
端口数量:2端子数量:48
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE WITH SERIES RESISTOR输出极性:TRUE
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DFP
封装形状:RECTANGULAR封装形式:FLATPACK
传播延迟(tpd):5.1 ns认证状态:Not Qualified
座面最大高度:3.05 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:BICMOS
温度等级:MILITARY端子形式:FLAT
端子节距:0.635 mm端子位置:DUAL
宽度:9.652 mmBase Number Matches:1

SN54LVTH162244WD 数据手册

 浏览型号SN54LVTH162244WD的Datasheet PDF文件第2页浏览型号SN54LVTH162244WD的Datasheet PDF文件第3页浏览型号SN54LVTH162244WD的Datasheet PDF文件第4页浏览型号SN54LVTH162244WD的Datasheet PDF文件第5页浏览型号SN54LVTH162244WD的Datasheet PDF文件第6页浏览型号SN54LVTH162244WD的Datasheet PDF文件第7页 
ꢍ ꢎꢍ ꢏꢅ ꢐꢑꢆ ꢈ ꢉ ꢏꢑꢒ ꢆ ꢑꢓꢔ ꢔ ꢕꢖꢀꢗ ꢘ ꢖꢒ ꢅ ꢕꢖ  
SCBS258M − JUNE 1993 − REVISED SEPTEMBER 2003  
SN54LVTH162244 . . . WD PACKAGE  
SN74LVTH162244 . . . DGG OR DL PACKAGE  
(TOP VIEW)  
D
D
Members of the Texas Instruments  
WidebusFamily  
Output Ports Have Equivalent 22-Series  
Resistors, So No External Resistors Are  
Required  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
2OE  
1A1  
1A2  
GND  
1A3  
1A4  
1OE  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
2
D
Support Mixed-Mode Signal Operation  
(5-V Input and Output Voltages With  
3
4
3.3-V V  
)
5
CC  
6
D
D
D
D
Support Unregulated Battery Operation  
Down to 2.7 V  
7
V
V
CC  
CC  
8
2A1  
2A2  
GND  
2A3  
2A4  
3A1  
3A2  
GND  
3A3  
3A4  
2Y1  
2Y2  
GND  
2Y3  
2Y4  
3Y1  
3Y2  
GND  
3Y3  
3Y4  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
9
= 3.3 V, T = 25°C  
A
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
I
and Power-Up 3-State Support Hot  
off  
Insertion  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
D
D
D
D
Distributed V  
High-Speed Switching Noise  
and GND Pins Minimize  
CC  
Flow-Through Architecture Optimizes PCB  
Layout  
V
V
CC  
CC  
4A1  
4A2  
GND  
4A3  
4A4  
3OE  
4Y1  
4Y2  
GND  
4Y3  
4Y4  
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
4OE  
description/ordering information  
The ’LVTH162244 devices are 16-bit buffers and line drivers designed for low-voltage (3.3-V) V  
operation,  
CC  
but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as  
four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical  
active-low output-enable (OE) inputs.  
ORDERING INFORMATION  
ORDERABLE  
T
PACKAGE  
TOP-SIDE MARKING  
A
PART NUMBER  
SN74LVTH162244DL  
SN74LVTH162244DLR  
SN74LVTH162244DGGR  
SN74LVTH162244KR  
74LVTH162244ZQLR  
SNJ54LVTH162244WD  
Tube  
SSOP − DL  
LVTH162244  
LVTH162244  
Tape and reel  
Tape and reel  
TSSOP − DGG  
VFBGA − GQL  
VFBGA − ZQL (Pb-free)  
CFP − WD  
−40°C to 85°C  
−55°C to 125°C  
Tape and reel  
Tube  
LL2244  
SNJ54LVTH162244WD  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
Copyright 2003, Texas Instruments Incorporated  
ꢚ ꢜ ꢝ ꢞ ꢟꢠ ꢡꢢ ꢣꢤ ꢢꢟ ꢥꢝ ꢦꢧ ꢨꢜ ꢣ ꢣꢟ ꢩꢒ ꢄꢏ ꢛꢖ ꢔ ꢏꢍꢪꢂ ꢍꢂꢋ ꢨꢦꢦ ꢝꢨ ꢞ ꢨ ꢥꢫ ꢣꢫꢞ ꢤ ꢨ ꢞ ꢫ ꢣꢫ ꢤꢣꢫ ꢠ  
ꢣ ꢫ ꢤ ꢣꢧ ꢜꢮ ꢟꢰ ꢨ ꢦꢦ ꢝꢨ ꢞ ꢨ ꢥ ꢫ ꢣ ꢫ ꢞ ꢤ ꢎ  
ꢡ ꢜꢦ ꢫꢤꢤ ꢟ ꢣꢬꢫ ꢞ ꢭꢧ ꢤꢫ ꢜ ꢟꢣꢫ ꢠꢎ ꢚ ꢜ ꢨꢦ ꢦ ꢟ ꢣꢬꢫ ꢞ ꢝꢞ ꢟ ꢠꢡꢢ ꢣꢤ ꢋ ꢝꢞ ꢟ ꢠꢡꢢ ꢣꢧꢟ ꢜ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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