Datasheet > SiR172ADP

SiR172ADP

更新时间： 2024-09-17 14:54:55

品牌	Logo	应用领域
威世 - VISHAY		/
页数	文件大小	规格书
13页	324K
描述
N-Channel 30 V (D-S) MOSFET

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SiR172ADP 数据手册

SiR172ADP

Vishay Siliconix

N-Channel 30 V (D-S) MOSFET

FEATURES

PRODUCT SUMMARY

•

TrenchFET^®Power MOSFET

Low Thermal Resistance PowerPAK^®Package

with Low 1.07 mm Profile

Optimized for High-Side Synchronous Rectifier

Operation

V_DS(V)

R_DS(on)() Max.

0.0085 at V_GS= 10 V

0.0105 at V_GS= 4.5 V

Q_g(Typ.)

_D(A)^{a, g}

12.8 nC

•

100 % R_gand UIS Tested

Material categorization: For definitions of compliance

please see www.vishay.com/doc?99912

PowerPAK SO-8

APPLICATIONS

• Notebook CPU Core

- High-Side Switch

6.15 mm

5.15 mm

Bottom View

Ordering Information:

SiR172ADP-T1-GE3 (Lead (Pb)-free and Halogen-free)

N-Channel MOSFET

ABSOLUTE MAXIMUM RATINGS (T = 25 °C, unless otherwise noted)

Parameter

Symbol

Limit

Unit

V_DS

Drain-Source Voltage

Gate-Source Voltage

V_GS

24^g

16.1^{b, c}

_C= 25 °C

T_C= 70 °C

T_A= 25 °C

T_A= 70 °C

Continuous Drain Current (T_J= 150 °C)

I_D

12.9^{b, c}

I_DM

I_S

Pulsed Drain Current (t = 300 µs)

24^g

3.5^{b, c}

T_C= 25 °C

T_A= 25 °C

Continuous Source-Drain Diode Current

I_AS

Single Pulse Avalanche Current

Avalanche Energy

L = 0.1 mH

E_AS

T_C= 25 °C

T_C= 70 °C

T_A= 25 °C

T_A= 70 °C

29.8

3.9^{b, c}

2.5^{b, c}

- 55 to 150

260

P_D

Maximum Power Dissipation

T_J, T_stg

Operating Junction and Storage Temperature Range

Soldering Recommendations (Peak Temperature)^{d, e}

°C

THERMAL RESISTANCE RATINGS

Parameter

Symbol

Typical

Maximum

Unit

Maximum Junction-to-Ambient^{b, f}

R_thJA

t  10 s

°C/W

R_thJC

Maximum Junction-to-Case (Drain)

Steady State

3.5

4.2

Notes:

a. Base on T_C= 25 °C.

b. Surface mounted on 1" x 1" FR4 board.

c. t = 10 s.

d. See Solder Profile (www.vishay.com/doc?73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper

(not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not

required to ensure adequate bottom side solder interconnection.

e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components.

f. Maximum under steady state conditions is 70 °C/W.

g. Package limited.

Document Number: 62609

S12-2052-Rev.B, 27-Aug-12

For technical questions, contact: pmostechsupport@vishay.com

This document is subject to change without notice.

www.vishay.com

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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与SiR172ADP相关器件

型号	品牌	获取价格	描述	数据表
SIR172ADP-T1-GE3	VISHAY	获取价格	Power Field-Effect Transistor, 24A I(D), 30V, 0.0085ohm, 1-Element, N-Channel, Silicon, Me
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