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SGA-8343Z PDF预览

SGA-8343Z

更新时间: 2024-11-26 04:04:55
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SIRENZA /
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描述
Low Noise, High Gain SiGe HBT

SGA-8343Z 数据手册

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SGA-8343  
SGA-8343Z  
Low Noise, High Gain SiGe HBT  
RoHS Compliant  
& Green Package  
Pb  
Product Description  
Preliminary  
Sirenza Microdevices’ SGA-8343 is a high performance Silicon  
Germanium Heterostructure Bipolar Transistor (SiGe HBT)  
designed for operation from DC to 6 GHz. The SGA-8343 is  
optimized for 3V operation but can be biased at 2V for low-voltage  
battery operated systems. The device provides high gain, low NF,  
and excellent linearity at a low cost. It can be operated at very low  
bias currents in applications where high linearity is not required.  
Product Features  
• Now Available in Lead Free, RoHS  
Compliant, & Green Packaging  
• DC-6 GHz Operation  
• 0.9 dB NFMIN @ 0.9 GHz  
• 24 dB Gmax @ 0.9 GHz  
The matte tin finish on Sirenza’s lead-free package utilizes a post  
annealing process to mitigate tin whisker formation and is RoHS  
compliant per EU Directive 2002/95. This package is also  
manufactured with green molding compounds that contain no  
antimony trioxide nor halogenated fire retardants.  
• |GOPT|=0.10 @ 0.9 GHz  
• OIP3 = +28 dBm, P1dB = +9 dBm  
• Low Cost, High Performance, Versatility  
Typical Performance - 3V, 10mA  
4 0  
3 5  
3 0  
2 5  
2 0  
1 5  
1 0  
5
2 .4  
2 .1  
1 .8  
1 .5  
1 .2  
0 .9  
0 .6  
0 .3  
0
Applications  
NFMIN  
Gain  
• Analog and Digital Wireless Systems  
• 3G, Cellular, PCS, RFID  
• Fixed Wireless, Pager Systems  
• Driver Stage for Low Power Applica-  
tions  
Gmax  
0
• Oscillators  
0
1
2
3
4
5
6
7
8
Frequency (GHz)  
Test Conditions  
VCE=3V, ICQ=10mA, 25°C  
(unless otherwise noted)  
Symbol  
Device Characteristics  
Test Frequency  
Units  
Min.  
Typ.  
Max.  
0.9 GHz  
1.9 GHz  
2.4 GHz  
23.9  
19.3  
17.7  
GMAX  
Maximum Available Gain  
ZS=ZS*, ZL=ZL*  
dB  
0.9 GHz  
1.9 GHz  
2.4 GHz  
0.94  
1.10  
1.18  
NF  
Minimum Noise Figure  
ZS=GammaOPT, ZL=ZL*  
ZS=ZL= 50 Ohms  
dB  
[1]  
S21  
NF  
Insertion Gain  
0.9 GHz  
1.9 GHz  
dB  
dB  
21.0  
22.0  
1.40  
23.0  
1.75  
LNA Application  
Circuit Board  
Noise Figure[2]  
LNA Application  
Circuit Board  
[2]  
Gain  
OIP3  
P1dB  
Gain  
1.9 GHz  
1.9 GHz  
1.9 GHz  
dB  
15.5  
25.8  
7.5  
16.5  
27.8  
9.0  
17.5  
LNA Application  
Circuit Board  
Output Third Order Intercept Point[2]  
dBm  
dBm  
LNA Application  
Circuit Board  
Output 1dB Compression Point[2]  
DC Current Gain  
hFE  
BVCEO  
Rth  
120  
5.7  
180  
6.0  
300  
Collector-Emitter Breakdown Voltage  
Thermal Resistance  
V
oC/W  
V
junction-to-lead  
collector-emitter  
collector-emitter  
200  
VCE  
Operating Voltage  
4.0  
50  
ICE  
Operating Current  
mA  
[1] 100% tested - Insertion gain tested using a 50 ohm contact board (no matching circuitry) during final production test.  
[2] Sample tested - Samples pulled from each wafer/package lot. Sample test specifications are based on statistical data from sample test measurements. The test fixture is  
an engineering application circuit board (parts are pressed down on the circuit board). The application circuit represents a trade-off between the optimal noise match and  
input return loss.  
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or omissions. Sirenza Microdevices assumes no responsibility for the use of this  
information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or  
granted to any third party. Sirenza Microdevices does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems.  
Copyright 2003 Sirenza Microdevices, Inc. All worldwide rights reserved.  
303 Technology Court, Broomfield, CO 80021  
Phone: (800) SMI-MMIC  
http://www.sirenza.com  
EDS-101845 Rev F  
1

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