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Q67000-H5113 PDF预览

Q67000-H5113

更新时间: 2024-09-08 22:44:11
品牌 Logo 应用领域
英飞凌 - INFINEON /
页数 文件大小 规格书
21页 447K
描述
GHz PLL with I2C Bus and Four Chip Addresses

Q67000-H5113 数据手册

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GHz PLL with I2C Bus  
and Four Chip Addresses  
MGP 3006X6  
Bipolar IC  
Features  
1-chip system for MPU-control (I2C Bus)  
4 programmable chip addresses  
Short pull-in time for quick channel switch-over  
and optimized loop stability  
3 high-current band switch outputs (20 mA)  
Software-compatible with SDA 3202 series  
Oxis III technology  
P-DSO-16-1  
Type  
Ordering Code  
Q67000-H5113  
Q67006-H5113  
Package  
P-DSO-16-1 (SMD)  
P-DSO-16-1 Tape & Reel (SMD)  
MGP 3006X6  
MGP 3006X6  
Combined with a VCO (tuner), the MGP 3006X6 device, with four hard-switched chip  
addresses, forms a digitally programmable phase-locked loop for use in television sets  
with PLL-frequency synthesis tuning. The PLL permits precise crystal-controlled setting  
of the frequency of the tuner oscillator between 16 and 1300 MHz in increments of  
62.5 kHz, and, with a 2.4-GHz prescaler 1/2, in the TV-SAT band in increments of  
125 kHz. The tuning process is controlled by a microprocessor via an I2C Bus. The  
I2C Bus noise immunity has been improved by a factor of 10 compared to the  
SDA 3202-2, and the new crystal oscillator generates a sinusoidal signal, suppressing  
the higher-order harmonics, which reduces the moiré noise considerably.  
Semiconductor Group  
1
04.93  

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