Datasheet > PM5324?

PM5324?

更新时间： 2024-09-15 23:28:51

品牌	Logo	应用领域
其他 - ETC		/
页数	文件大小	规格书
2页	55K
描述
Short Form PMC-2012473 PM5324 ARROW-1x192 SONET/SDH Transport Framer/Aggregator for OC-48 and OC-192 Short Form Data Sheet [55 kB]

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中文翻译

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PM5324? 数据手册

PM5324

ARROW-1x192

Advance, Issue 1

SONET/SDH Transport Framer/Aggregator for OC-48 and OC-192

FEATURES

• SONET/SDH framer/aggregator for

• Supports channelized (down to

STS-1), concatenated, and arbitrarily

concatenated (STS-3cxN) traffic.

Changes in traffic configurations are

automatically detected.

• Terminates (or monitors) SONET/SDH

Section, Line, and Path overhead and

provides STS-1 granularity frame

alignment and pointer processing.

• Detects and inserts transport and path

BIP-8 errors (B1, B2, B3). Detects

signal degrade (SD) and signal fail

(SF) threshold crossing alarms for B2

and B3.

• Provides overhead passthrough for

entire TOH, and re-mapping for B1,

B2, and J0 bytes.

• Provides dedicated pins to extract and

reinsert the entire transport overhead.

• Provides dedicated pins to extract

section and line DCC.

• Supports Automatic Protection

Switching:

use in channelized STS-192/STM-64

and STS-48/STM-16 applications.

• 10 Gbit/s aggregate capacity. The

framer can be configured to support:

•

K1/K2 byte filtering and BER

monitoring.

•

Direct line card APS connections via

system side APS ports.

•

One STS-192/STS-192c/

STM-64/STM-64c stream.

• Supports centralized control of

SONET/SDH processing by providing

in-band status messaging (Transport,

Path, and Equipment Status) on the

ESSI ports.

• Provides independent STS-1 Memory

Switching Units (MSU) for combined

time-slot interchange (TSI) and muxing

functions in transmit and receive

directions.

• Provides independent STS-1 Memory

Switching Units (MSU) at the DROP

APS port for grooming traffic to support

line card pairing or local traffic

termination.

•

Four STS-48/STS-48c/

STM-16/STM-16c streams.

• Supports one STS-192/STM-64

stream via a standard OIF SFI-4

interface (duplex 16-bit 622 MHz

LVDS) for direct connection to

SERDES and CRU/CSU devices.

• Supports up to four STS-48/STM-16

via SFI-4 interfaces operating in nibble

mode.

• Provides working, protect, and APS

interfaces for connection across

system backplanes. Each interface

consists of four ESSI (Extended

SONET Serial Interface) CML links,

operating at 2.488 Gbit/s.

BLOCK DIAGRAM

Transport

Overhead/DCC

Extract/Insert

Section/

Line DCC

Transport

Overhead

Extract/Insert

Ring

Control

Port

Section/

Line

Alarms

Line side

System side

Frame

Aligner

Main MSU

Section

Trace

Bit

Error

Path

Trace

Bit

Error

Alarm Reporting

Controller

Fixed

Delay

Var.

Delay

APS

Transport

Overhead

Extract/

Insert

Aligner and

Transport Overhead

Transparency

Tx/Rx

OIF SFI-4

16 x 622

Mbit/s

Section/Line

Overhead

Path

Overhead

Line

Interface

APS MSU

APS

PMC-2012473 (A1)

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

中文翻译

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