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PI74AVC+16820AK PDF预览

PI74AVC+16820AK

更新时间: 2024-10-29 05:27:39
品牌 Logo 应用领域
百利通 - PERICOM 光电二极管
页数 文件大小 规格书
11页 614K
描述
Bus Driver, AVC Series, 1-Func, 10-Bit, True Output, CMOS, PDSO56, 0.173 INCH, PLASTIC, TSSOP-56

PI74AVC+16820AK 数据手册

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PI74AVC+16820A  
2.5V 10-Bit Flip-Flop with  
Dual and 3-State Outputs  
Features  
Description  
• Designed for low-voltage operation, V = 1.65V to 3.6V  
Pericom Semiconductor’s PI74AVC+16820A, a 10-bit flip-flop  
CC  
designed for 1.65V to 3.6V V operation. It is designed with  
edge-triggered D-type flip-flops. On the positive transition of clock  
(CLK) input. The device provides true data at the Q outputs.  
CC  
• True ±24mA Balanced Drive @ 3.3V  
• I  
supports Partial power-down operation  
OFF  
• 3.6V I/O Tolerant inputs and outputs  
A buffered output-enable (OE) input can be used to place the ten  
outputs in either a normal logic state (HIGH or LOW level) or  
a high-impedance state. In the high-impedance state, the outputs  
neitherloadnordrivethebuslinessignificantly.Thehigh-impedance  
state and increased drive provide the capacity to drive bus lines  
without the need for interface or pullup components.  
• All outputs contain a patented DDC (Dynamic Drive-  
Control) circuit that reduces noise without degrading  
propagation delay.  
• Industrial operation: –40°C to +85°C  
• Packaging (Pb-free & Green available):  
– 56-pin 240-mil wide plastic TSSOP (A)  
– 56-pin 173-mil wide plastic TVSOP (K)  
OE does not affect the internal operation of the flip-flops. Old data  
can be retained or new data can be entered while the outputs are in  
the high-impedance state.  
To ensure the high-impedance state during power-up or power-  
Pin Configuration  
down, OE should be tied to V through a pullup resistor whose  
CC  
minimum value is determined by the current sinking capability of  
the driver.  
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TO 9 OTHER CHANNELS  
PS8696E  
06/09/06  
1
06-0173  

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