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PI74AVC+16821A PDF预览

PI74AVC+16821A

更新时间: 2024-10-27 22:44:27
品牌 Logo 应用领域
百利通 - PERICOM 触发器
页数 文件大小 规格书
10页 518K
描述
2.5V 20-Bit Bus Interface Flip-Flop with 3-State Outputs

PI74AVC+16821A 数据手册

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PI74AVC+16821  
2.5V 20-Bit Bus Interface  
Flip-Flop with 3-State Outputs  
Description  
Product Features  
Pericom Semiconductor’s PI74AVC+ series of logic circuits are  
produced using the Company’s advanced submicron CMOS  
technology, achieving industry leading speed.  
• PI74AVC+16821 is designed for low-voltage operation,  
VCC = 1.65V to 3.6V  
• True ±24mA Balanced Drive @ 3.3V  
• IOFF supports partial power-down operation  
• 3.6V I/O Tolerant Inputs and Outputs  
ThePI74AVC+16821isa20-bit businterfaceflip-flopdesignedfor  
1.65V to3.6V V operation. Itcanbeusedastwo10-bitflip-flops  
CC  
or one 20-bit flip-flop. The 20 flip-flops are edge-triggered D-type  
flip-flops. On the positive transition of the clock (CLK) input, the  
device provides true data at the Q outputs.  
• All outputs contain a patented DDC  
(Dynamic Drive Control) circuit that reduces noise  
without degrading propagation delay  
A buffered output-enable (OE) input can be used to place the ten  
outputsineitheranormallogicstate(HIGHorLOWlevel)orahigh-  
impedance state. In the high-impedance state, the outputs neither  
loadnordrivethebuslinessignificantly.Thehigh-impedancestate  
and increased drive provide the capacity to drive bus lines without  
the need for interface or pullup components.  
• Industrial operation: –40°C to +85°C  
• Available Packages:  
– 56-pin 240 mil wide plastic TSSOP (A)  
– 56-pin 173 mil wide plastic TVSOP (K)  
OE does not affect the internal operation of the flip-flops. Old data  
can be retained or new data can be entered while the outputs are in  
the high-impedance state.  
To ensure the high-impedance state during power up or power  
down, OE should be tied to V through a pullup resistor; the  
CC  
minimum value of the resistor is determined by the current sinking  
capability of the driver.  
LogicBlockDiagram  
1
28  
1OE  
2OE  
56  
55  
29  
42  
1CLK  
2CLK  
One of Ten  
Channels  
One of Ten  
Channels  
C
1
C1  
2
15  
1D1  
1Q1  
2D1  
2Q1  
1
D
1D  
TO 9 OTHER CHANNELS  
TO 9 OTHER CHANNELS  
PS8548  
07/31/01  
1

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