Datasheet > PI74AVC+16823A

PI74AVC+16823A

更新时间： 2024-10-27 23:27:39

品牌	Logo	应用领域
其他 - ETC		触发器
页数	文件大小	规格书
10页	151K
描述
18-Bit D-Type Flip-Flop

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中文翻译

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数据手册

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PI74AVC+16823A 数据手册

PI74AVC+16823

2.5V 18-Bit Bus Interface

Flip-Flop with 3-State Outputs

Product Features

ProductDescription

Pericom Semiconductor’s PI74AVC series of logic circuits are

• PI74AVC 16823 is designed for low voltage operation,

produced using the Company’s advanced submicron CMOS

technology, achieving industry leading speed.

= 1.65V to 3.6V

• True ±24mA Balanced Drive @ 3.3V

• I supports partial power-down operation

The18-bitPI74AVC 16823bus-interfaceflip-flop isdesignedfor

OFF

1.65V to 3.6V V operation. It features 3-state outputs designed

• 3.6V I/O Tolerant Inputs and Outputs

specificallyfordrivinghighlycapacitiveorrelativelylow-impedance

loads. This device is particularly suitable for implementing wider

bufferregisters,I/Oports,bidirectionalbusdriverswithparity,and

workingregisters.

• All outputs contain a patented DDC

(Dynamic DriveControl) circuit that reduces noise without

degrading propagation delay.

Thedevicecanbeusedastwo9-bitflip-flopsorone18-bitflip-flop.

WiththeClockEnable(CLKEN)inputLOW,theD-typeflip-flops

enter data on the low-to-high transitions of the clock. Taking

CLKEN HIGH disables the clock buffer, thus latching the outputs.

TakingtheClear(CLR)inputLOWcausestheQoutputstogoLOW

independently of the clock.

• Industrial operation at –40°C to +85°C

• Available Packages:

– 56-pin 240 mil wide plastic TSSOP (A)

– 56-pin 173 mil wide plastic TVSOP (K)

LogicBlockDiagram

A buffered Output Enable (OE) input can be used to place the nine

outputs in either a normal logic state (high or low logic levels) or

high-impedance state. In the high-impedance state, the outputs

neither load n or drive the bus lines significantly. The high-

impedancestateandincreaseddriveprovidethecapabilitytodrive

bus lines without need for interface or pullup components.

1OE

1CLR

1CLKEN

TheOutputEnable(OE)inputdoesnotaffecttheinternaloperation

oftheflip-flops.Olddatacanberetainedornewdatacanbeentered

while the outputs are in the high-impedance state.

CLK

1Q1

1D1

To ensure the high-impedance state during power up or power

down, OE should be tied to V through a pullup resistor; the

minimumvalueoftheresistorisdeterminedbythecurrent-sinking

capability of the driver.

2OE

CLR

CLKEN

2CLK

2Q1

2D1

PS8489

07/24/00

12 3 4 5 6 7...10

中文翻译

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与PI74AVC+16823A相关器件

型号	品牌	获取价格	描述	数据表
PI74AVC+16823K	ETC	获取价格	18-Bit D-Type Flip-Flop
PI74AVC+16827A	ETC	获取价格	Dual 10-Bit Buffer/Driver
PI74AVC+16827AEX	PERICOM	获取价格	Bus Driver, AVC Series, 2-Func, 10-Bit, True Output, CMOS, PDSO56, 0.240 INCH, PLASTIC, TS
PI74AVC+16827AX	PERICOM	获取价格	Bus Driver, AVC Series, 2-Func, 10-Bit, True Output, CMOS, PDSO56, 0.240 INCH, PLASTIC, TS
PI74AVC+16827K	ETC	获取价格	Dual 10-Bit Buffer/Driver
PI74AVC+16827KEX	PERICOM	获取价格	Bus Driver, AVC Series, 2-Func, 10-Bit, True Output, CMOS, PDSO56, 0.173 INCH, PLASTIC, TV
PI74AVC+16827KX	PERICOM	获取价格	Bus Driver, AVC Series, 2-Func, 10-Bit, True Output, CMOS, PDSO56, 0.173 INCH, PLASTIC, TV
PI74AVC+16836A	ETC	获取价格	20-Bit Buffer/Driver
PI74AVC+16836AEX	PERICOM	获取价格	Bus Driver, AVC Series, 1-Func, 20-Bit, True Output, CMOS, PDSO56, 0.240 INCH, PLASTIC, TS
PI74AVC+16836K	ETC	获取价格	20-Bit Buffer/Driver

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