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PI74AVC+16721KX PDF预览

PI74AVC+16721KX

更新时间: 2024-10-28 20:50:27
品牌 Logo 应用领域
百利通 - PERICOM 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
10页 526K
描述
Bus Driver, AVC Series, 1-Func, 20-Bit, True Output, CMOS, PDSO56, 0.173 INCH, PLASTIC, TSSOP-56

PI74AVC+16721KX 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP,
针数:56Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.92系列:AVC
JESD-30 代码:R-PDSO-G56长度:11.3 mm
逻辑集成电路类型:BUS DRIVER位数:20
功能数量:1端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
传播延迟(tpd):4.3 ns认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.4 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

PI74AVC+16721KX 数据手册

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PI74AVC+16721  
2.5V 20-Bit Flip-Flop  
with 3-State Outputs  
ProductDescription  
Product Features  
Pericom Semiconductor’s PI74AVC+ series of logic circuits are  
produced using the Company’s advanced submicron CMOS  
technology, achieving industry leading speed.  
• PI74AVC+16721 is designed for low-voltage operation,  
VCC = 1.65V to 3.6V  
• True ±24mA Balanced Drive @ 3.3V  
• IOFF supports partial power-down operation  
• 3.6V I/O Tolerant inputs and outputs  
The PI74AVC+16721 is a 20-bit flip-flop with 3-state outputs  
designed specifically for 1.65V to 3.6V V  
operation. The  
CC  
device is designed with edge-triggered D-type flip-flops with  
qualified clock storage. On the positive transition of clock (CLK)  
input, the device provides true data at the Q outputs, provided  
thattheclock-enable(CLKEN)inputisLOW.If CLKENisHIGH,  
no data is stored.  
• All outputs contain a patented DDC  
(Dynamic DriveControl) circuit that reduces noise without  
degrading propagation delay.  
• Industrial operation: –40°C to +85°C  
• Available Packages:  
A buffered output-enable (OE) input can be used to place the  
20 outputs in either a normal logic state (HIGH or LOW level) or a  
high-impedance state. In the high-impedance state, the outputs  
neitherloadnordrivethebuslinessignificantly.Thehigh-impedance  
state and increased drive provide the capacity to drive bus lines  
without the need for interface or pullup components. OE does not  
affect the internal operation of the flip-flops. Old data can be  
retainedor newdatacanbeenteredwhiletheoutputsareinthehigh-  
impedance state.  
– 56-pin 240 mil wide plastic TSSOP (A)  
– 56-pin 173 mil wide plastic TVSOP (TSSOP) (K)  
To ensure the high-impedance state during power up or power  
down, OE should be tied to V through a pullup resistor; the  
CC  
minimumvalue of the resistor is determined by the current-sinking  
capability of the driver.  
LogicBlockDiagram  
1
56  
29  
2
55  
PS8483  
03/23/01  
1

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