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PI74AVC+16646K

更新时间: 2024-10-27 23:27:39
品牌 Logo 应用领域
其他 - ETC 总线收发器
页数 文件大小 规格书
11页 306K
描述
Dual 8-bit Bus Transceiver

PI74AVC+16646K 数据手册

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PI74AVC+16646  
2.5V 16-Bit Bus Transceiver and  
Register with 3-State Outputs  
Product Features  
ProductDescription  
Pericom Semiconductor’s PI74AVC+ series of logic circuits are  
produced using the Company’s advanced sub-micron CMOS  
technology, achieving industry leading speed.  
• PI74AVC+16646 is designed for low voltage operation,  
V
= 1.65V to 3.6V  
CC  
• True ±24mA Balanced Drive @ 3.3V  
• I supports partial power-down operation  
ThePI74AVC+16646isa16-bitbustransceiverandregisterdesigned  
OFF  
for 1.65V to 3.6V V operation. It can be used as two 8-bit  
CC  
• 3.6V I/O Tolerant Inputs and Outputs  
transceivers or one 16-bit transceiver. Data on the A or B bus is  
clocked into the registers on the low-to-high transition of the  
appropriateClock(CLKABorCLKBA)input.Fourfundamentalbus-  
management functions can be performed.  
• All outputs contain a patented DDC  
(Dynamic DriveControl) circuit that reduces noise without  
degrading propagation delay.  
OutputEnable(OE)andDirectionControl(DIR)inputsareprovided  
to control the transceiver functions. In the transceiver mode, data  
present at the high-impedance port may be stored in either register  
or in both. The Select Control (SAB and SBA) inputs can multiplex  
stored and real-time (transparent mode) data. Circuitry used for  
Select Control eliminates the typical decoding glitch that occurs in  
amultiplexerduringthetransitionbetweenstoredandreal-timedata.  
DIR determines which bus receives data when OE is LOW. In the  
isolationmode(OEHIGH), Adatamaybestoredinoneregisterand/  
or B data may be stored in the other register.  
• Industrial operation at –40°C to +85°C  
• Available Packages:  
– 56-pin 240 mil wide plastic TSSOP (A)  
– 56-pin 173 mil wide plastic TVSOP (K)  
When an output function is disabled, the input function is still  
enabled and may be used to store and transmit data. Only one of the  
two buses, A or B, can be driven at a time.  
Toensurethehigh-impedancestateduringpoweruporpowerdown,  
OE should be tied to V through a pullup resistor; the minimum  
CC  
value of the resistor is determined by the current-sinking capability  
of the driver.  
Logic Block Diagrams  
56  
1OE  
29  
2OE  
1
1DIR  
28  
2DIR  
55  
1CLKBA  
30  
2CLKBA  
54  
1SBA  
31  
2SBA  
2
1CLKAB  
27  
2CLKAB  
3
1SAB  
26  
2SAB  
One of Eight Channels  
1D  
C1  
One of Eight Channels  
1D  
C1  
5
1A1  
15  
2A1  
52  
1B1  
42  
2B1  
1D  
C1  
1D  
C1  
TO SEVEN OTHER CHANNELS  
TO SEVEN OTHER CHANNELS  
PS8506B  
02/26/01  
1

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