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PI74ALVTC16652KEX PDF预览

PI74ALVTC16652KEX

更新时间: 2024-10-29 08:49:11
品牌 Logo 应用领域
百利通 - PERICOM 光电二极管电视
页数 文件大小 规格书
11页 167K
描述
Registered Bus Transceiver, ALVT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.173 INCH, PLASTIC, TVSOP-56

PI74ALVTC16652KEX 数据手册

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PI74ALVTC16652  
2.5V 16-Bit Bus Transceiver and  
Register with 3-State Outputs  
Product Features  
ProductDescription  
• PI74ALVTC16652isdesignedforlowvoltageoperation,  
Pericom Semiconductor’s PI74ALVTC series of logic circuits are  
produced using the Company’s advanced 0.35 micron CMOS  
technology, achieving industry leading speed.  
V
DD  
=1.65Vto3.6V  
• Supports Live Insertion  
ThePI74ALVTC16652isa16-bitbustransceiverandregisterdesigned  
forlow1.65V to3.6VVccoperation.ItconsistsofD-typeflip-flops  
and control circuitry arranged for multiplexed transmission of data  
directly from the data bus or from the internal storage registers. The  
devicecanbeusedastwo8-bittransceiversorone16-bittransceiver.  
• 3.6V I/O Tolerant Inputs and Outputs  
• Bus Hold  
• HighDrive,–32/64mA@3.3V  
• Uses patented noise reduction circuitry  
• Power-off high impedance inputs and outputs  
• Industrial operation at –40°C to +85°C  
• Packagesavailable:  
Complementary Output Enable (OEAB and OEBA) inputs are  
provided to control the transceiver functions. Select Control (SAB  
and SBA) inputs are provided to select whether real-time or stored  
dataistransferred.Alowinputlevelselectsreal-timedata,andahigh  
input level selects stored data. Circuitry used for Select Control  
eliminates the typical decoding glitch that occurs in a multiplexer  
during the transition between stored and real-time data.  
–56-pin240-milwideplasticTSSOP(A56)  
–56-pin173-milwideplasticTVSOP(K56)  
LogicBlockDiagram  
Data on the A or B bus, or both, can be stored in the internal D flip-  
flopsbylow-to-hightransitionsattheappropriateclock(CLKABor  
CLKBA) inputs regardless of the levels on the Select Control or  
Output Enable inputs. When SAB and SBA are in the real-time  
transfer mode, it also is possible to store data without using the  
internal D-type flip-lops by simultaneously enabling OEAB and  
OEBA. Inthisconfiguration, eachoutputreinforcesitsinput. Thus,  
whenallotherdatasourcestothetwosetsofbuslinesareinthehigh-  
impedance state, each set of bus lines remains at its last level  
configuration.  
56  
1OEBA  
1
1OEAB  
55  
1CLKBA  
54  
1SBA  
2
1CLKAB  
3
1SAB  
One of Eight Channels  
1D  
C1  
Toensurethehigh-impedancestateduringpoweruporpowerdown,  
OEBA should be tied to Vcc through a pull-up resistor and OEAB  
should be tied to GND through a pull-down resistor; the minimum  
value of the resistor is determined by the current-sinking current  
sourcing capability of the driver.  
5
1A1  
52  
1B1  
1D  
C1  
The family offers both I/O Tolerant, which allows it to operate in  
mixed 1.65/3.6V systems, and “Bus Hold,” which retains the data  
input’s last state preventing “floating” inputs and eliminating the  
need for pullup/down resistors.  
TO SEVEN OTHER CHANNELS  
29  
2OEBA  
28  
30  
2OEAB  
2CLKBA  
31  
27  
2SBA  
2CLKAB  
26  
2SAB  
One of Eight Channels  
1D  
C1  
15  
2A1  
42  
2B1  
1D  
C1  
TO SEVEN OTHER CHANNELS  
PS8597  
01/22/02  
1

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