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PI74ALVTC16827AX PDF预览

PI74ALVTC16827AX

更新时间： 2024-10-28 18:59:35
品牌 Logo 应用领域
百利通 - PERICOM 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
8页 134K
描述
Bus Driver, ALVT Series, 2-Func, 10-Bit, True Output, CMOS, PDSO56, 0.240 INCH, PLASTIC, TSSOP-56

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PI74ALVTC16827AX 技术参数

生命周期：Obsolete零件包装代码：TSSOP
包装说明：TSSOP,针数：56
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.84
系列：ALVTJESD-30 代码：R-PDSO-G56
JESD-609代码：e0长度：14 mm
逻辑集成电路类型：BUS DRIVER位数：10
功能数量：2端口数量：2
端子数量：56最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH传播延迟（tpd）：4 ns
认证状态：Not Qualified座面最大高度：1.2 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：TIN LEAD端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
宽度：6.1 mmBase Number Matches：1

PI74ALVTC16827AX 数据手册

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PI74ALVTC16827  
2.5V 20-Bit Buffer/Driver  
with 3-State Outputs  
Product Features  
ProductDescription  
• PI74ALVTC16827isdesignedforlowvoltageoperation,  
Pericom Semiconductor’s PI74ALVTC series of logic circuits are  
produced using the Company’s advanced 0.35 micron CMOS  
technology, achieving industry leading speed.  
V
DD  
=1.65Vto3.6V  
• Supports Live Insertion  
• 3.6V I/O Tolerant Inputs and Outputs  
• Bus Hold  
The PI74ALVTC16827, is a 20-Bit non-inverting buffer/driver  
designed for 1.65V to 3.6V Vcc operation.  
• HighDrive,–32/64mA@3.3V  
• Uses patented noise reduction circuitry  
• Power-off high impedance inputs and outputs  
• Industrial operation at –40°C to +85°C  
• Packagesavailable:  
A buffer/driver is composed of two 10-bit sections with separate  
output-enable signals. For either 10-Bit buffer section, the two  
output-enable (1OE1and1OE2or2OE1and2OE2inputsmustboth  
belowforthecorrespondingYoutputstobeactive.Ifeitheroutput-  
enable input is HIGH, the output of that 10-Bit buffer section are in  
the high-impedance state.  
–56-pin240-milwideplasticTSSOP(A56)  
–56-pin173-milwideplasticTVSOP(K56)  
To ensure the high-impedance state during power up or power  
down, OE should be tied to Vcc through a pullup resistor whose  
minimum value is determined by the current sinking capability of  
the driver.  
The family offers both I/O Tolerant, which allows it to operate in  
mixed 1.65/3.6V systems, and “Bus Hold,” which retains the data  
input’s last state preventing “floating” inputs and eliminating the  
need for pullup/down resistors.  
Logic Block Diagram  
1
28  
1OE  
1
2
2OE  
1
2
56  
29  
1OE  
2OE  
55  
42  
2
15  
1A1  
2A1  
1Y1  
2Y1  
To 9 Other Channels  
To 9 Other Channels  
PS8619  
06/05/02  
1
12345678

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