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PI74AUC164245AEX PDF预览

PI74AUC164245AEX

更新时间: 2024-10-28 19:59:35
品牌 Logo 应用领域
百利通 - PERICOM 光电二极管逻辑集成电路
页数 文件大小 规格书
9页 678K
描述
Bus Transceiver, AUC Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.240 INCH, GREEN, PLASTIC, TSSOP-48

PI74AUC164245AEX 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP48,.3,20
针数:48Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.73控制类型:COMMON CONTROL
计数方向:BIDIRECTIONAL系列:AUC
JESD-30 代码:R-PDSO-G48JESD-609代码:e3
长度:12.5 mm负载电容(CL):15 pF
逻辑集成电路类型:BUS TRANSCEIVER最大I(ol):0.0001 A
湿度敏感等级:1位数:8
功能数量:2端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP48,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:0.8/2.7 V最大电源电流(ICC):0.02 mA
Prop。Delay @ Nom-Sup:4.5 ns传播延迟(tpd):4.5 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):2.7 V
最小供电电压 (Vsup):0.8 V标称供电电压 (Vsup):1.2 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
翻译:0.8/2.7V &0.8/2.7V宽度:6.1 mm
Base Number Matches:1

PI74AUC164245AEX 数据手册

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PI74AUC164245  
16-Bit 0.8V to 2.7V Scaled Configurable Level  
Shifting Transceiver with 3-State Outputs  
Features  
Description  
• PI74AUC164245 is designed for low voltage operation:  
0.8V to 2.7V  
The PI74AUC164245 is a 16-bit (dual-octal) noninverting bus  
transceiver that contains two separate supply rails. B port (V  
)
CCB  
set to operate at 0.8 to 2.5V and A port (V  
) set to operate  
CCA  
• I  
supports partial Power-Down mode operation  
OFF  
at 0.8 to 2.5V. This arrangement permits universal bidirectional  
translation over the voltage ranges.  
• Drive Capability 16mA @ 2.5V  
• Each supply rail is configurable over supply range  
The PI74AUC164245isdesignedforasynchronouscommunication  
between data buses. Data is transmitted from theAbus to the B bus  
or vice versa, depending on the logic level at the direction control  
(DIR)input.Theoutput-enable(OE)inputisusedtodisableoutputs  
so buses are isolated.  
• ESD Protection exceeds JESD22  
– 2000V Human Body Model (A114-B)  
– 200V Machine Model (A115-A)  
• Latch-up performance exceeds 100mA per JESD 78  
• Industrial operation at –40°C to +85°C  
The control pins, DIR, DIR, OE and OE are supplied by  
1
2
1
2
V
.
• Packaging (Pb-free & Green available):  
– 48-pin plastic 240-mil TSSOP (A)  
– 48-pin plastic 173-mil TVSOP (K)  
CCA  
The device is fully specified for partial-power-down applications  
using I . The I circuitry disables the outputs, preventing  
OFF  
OFF  
damaging current backflow through the device when it is powered  
down.  
To ensure the high impedance state during power up or power  
down, the output-enable (OE) input should be tied to V through  
a pullup resistor, the minimum value of the resistor is determined  
by the current-sinking capability of the driver.  
CC  
Block Diagram  
1
1DIR  
48  
1OE  
47  
1A1  
2
1B1  
To Seven Other Channels  
24  
2DIR  
25  
2OE  
36  
2A1  
13  
2B1  
To Seven Other Channels  
PS8730A  
05/31/06  
06-0163  
1

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