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PI74AVC!6820 PDF预览

PI74AVC!6820

更新时间: 2024-10-27 22:44:27
品牌 Logo 应用领域
百利通 - PERICOM 触发器
页数 文件大小 规格书
11页 443K
描述
2.5V 10-Bit Flip-Flop with Dual and 3-State Outputs

PI74AVC!6820 数据手册

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PI74AVC+16820  
2.5V 10-Bit Flip-Flop with  
Dual and 3-State Outputs  
Features  
Description  
• PI74AVC+16820 is designed for low-voltage operation,  
Pericom Semiconductor’s PI74AVC+16820, a 10-bit flip-flop  
V
= 1.65V to 3.6V  
designed for 1.65V to 3.6V V operation. It is designed with  
CC  
CC  
edge-triggeredD-typeip-ops. Onthepositivetransitionofclock  
(CLK) input. The device provides true data at the Q outputs.  
• True ±24mA Balanced Drive @ 3.3V  
• I supports Partial power-down operation  
OFF  
A buffered output-enable (OE) input can be used to place the ten  
outputs in either a normal logic state (HIGH or LOW level) or  
a high-impedance state. In the high-impedance state, the outputs  
neitherloadnordrivethebuslinessignificantly.Thehigh-impedance  
state and increased drive provide the capacity to drive bus lines  
without the need for interface or pullup components.  
• 3.6V I/O Tolerant inputs and outputs  
• All outputs contain a patented DDC (Dynamic Drive-  
Control) circuit that reduces noise without degrading  
propagation delay.  
• Industrial operation: –40°C to +85°C  
• Packaging (Pb-free & Green available):  
– 56-pin 240-mil wide plastic TSSOP (A)  
– 56-pin 173-mil wide plastic TVSOP (K)  
OE does not affect the internal operation of the flip-flops. Old data  
can be retained or new data can be entered while the outputs are in  
the high-impedance state.  
To ensure the high-impedance state during power-up or power-  
down, OE should be tied to V through a pullup resistor whose  
CC  
minimum value is determined by the current sinking capability of  
the driver.  
Pin Configuration  
ꢃꢄ  
ꢃꢃ  
ꢃꢂ  
ꢃꢁ  
ꢃꢀ  
ꢃ�  
ꢃꢈ  
ꢂꢇ  
ꢂꢆ  
ꢂꢅ  
ꢂꢄ  
ꢂꢃ  
ꢂꢂ  
ꢂꢁ  
ꢂꢀ  
ꢂ�  
ꢂꢈ  
ꢁꢇ  
ꢁꢆ  
ꢁꢅ  
ꢁꢄ  
ꢁꢃ  
ꢁꢂ  
ꢁꢁ  
ꢁꢀ  
ꢁ�  
ꢁꢈ  
ꢀꢇ  
ꢐꢑꢒ  
�  
ꢉꢊ  
�  
ꢀ  
ꢌꢍꢎ  
�  
ꢀ  
ꢐꢐ  
�  
ꢀ  
�  
ꢌꢍꢎ  
ꢀ  
�  
ꢀ  
�  
ꢀ  
�  
ꢌꢍꢎ  
ꢀ  
�  
ꢀ  
ꢐꢐ  
�  
ꢀ  
ꢌꢍꢎ  
�ꢈ�  
�ꢈꢀ  
ꢉꢊ  
ꢍꢐ  
ꢌꢍꢎ  
ꢀ  
ꢍꢐ  
ꢐꢐ  
ꢁ  
ꢍꢐ  
ꢂ  
�ꢈ  
��  
�ꢀ  
�ꢁ  
�ꢂ  
�ꢃ  
�ꢄ  
�ꢅ  
�ꢆ  
�ꢇ  
ꢀꢈ  
ꢀ�  
ꢀꢀ  
ꢀꢁ  
ꢀꢂ  
ꢀꢃ  
ꢀꢄ  
ꢀꢅ  
ꢀꢆ  
Block Diagram  
ꢌꢍꢎ  
ꢍꢐ  
ꢃ  
1
1OE  
ꢍꢐ  
ꢄ  
ꢍꢐ  
ꢅ  
28  
2OE  
ꢌꢍꢎ  
ꢍꢐ  
ꢆ  
2
1Q1  
56  
55  
CLK  
D1  
C1  
ꢍꢐ  
ꢐꢐ  
ꢇ  
3
1D  
1Q2  
ꢍꢐ  
ꢌꢍꢎ  
�ꢈ  
ꢍꢐ  
ꢍꢐ  
TO 9 OTHER CHANNELS  
PS8446D  
08/18/04  
1

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