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PHN203

更新时间: 2024-01-21 21:56:13
品牌 Logo 应用领域
恩智浦 - NXP 晶体晶体管开关光电二极管
页数 文件大小 规格书
7页 102K
描述
Dual N-channel enhancement mode TrenchMOS transistor

PHN203 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SOIC
包装说明:PLASTIC, SO-8针数:8
Reach Compliance Code:compliantECCN代码:EAR99
风险等级:5.16其他特性:LOGIC LEVEL COMPATIBLE
配置:SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE最小漏源击穿电压:30 V
最大漏极电流 (ID):6.3 A最大漏源导通电阻:0.03 Ω
FET 技术:METAL-OXIDE SEMICONDUCTOR最大反馈电容 (Crss):135 pF
JEDEC-95代码:MS-012AAJESD-30 代码:R-PDSO-G8
JESD-609代码:e4湿度敏感等级:2
元件数量:2端子数量:8
工作模式:ENHANCEMENT MODE最高工作温度:150 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
极性/信道类型:N-CHANNEL最大功率耗散 (Abs):1.5 W
认证状态:Not Qualified子类别:FET General Purpose Power
表面贴装:YES端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子位置:DUAL
处于峰值回流温度下的最长时间:30晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

PHN203 数据手册

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Philips Semiconductors  
Product specification  
Dual N-channel enhancement mode  
TrenchMOSTM transistor  
PHN203  
FEATURES  
SYMBOL  
QUICK REFERENCE DATA  
• Dual device  
VDS = 25 V  
d1 d1  
d2 d2  
• Low threshold voltage  
• Fast switching  
ID = 6.3 A  
• Logic level compatible  
• Surface mount package  
RDS(ON) 30 m(VGS = 10 V)  
RDS(ON) 55 m(VGS = 4.5 V)  
s1  
g1  
s2  
g2  
GENERAL DESCRIPTION  
PINNING  
SOT96-1  
8
7
6
5
N-channel enhancement mode  
field-effect power transistor in a  
plastic envelope using ’trench’  
technology. The device has very  
low on-state resistance. It is  
intended for use in dc to dc  
converters and general purpose  
switching applications.  
PIN  
DESCRIPTION  
source 1  
gate 1  
1
2
3
source 2  
gate 2  
pin 1 index  
4
1
2
3
4
The PHN203 is supplied in the  
SOT96-1 (SO8) surface mounting  
package.  
5,6  
7,8  
drain 2  
drain 1  
LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134)  
SYMBOL PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
VDS  
Repetitive peak drain-source  
voltage  
Tj = 25 ˚C to 150˚C  
-
25  
V
VDS  
VDGR  
VGS  
ID  
Continuous drain-source voltage  
Drain-gate voltage  
-
-
-
-
-
-
-
-
25  
25  
± 20  
6.3  
5
4.4  
3.5  
25  
V
V
V
A
A
A
A
A
RGS = 20 kΩ  
Gate-source voltage  
Drain current per MOSFET1  
Ta = 25 ˚C  
Ta = 70 ˚C  
Ta = 25 ˚C  
Ta = 70 ˚C  
Ta = 25 ˚C  
ID  
Drain current per MOSFET (both  
MOSFETs conducting)1  
Drain current per MOSFET (pulse  
peak value)  
IDM  
Ptot  
Total power dissipation (either or  
both MOSFETs conducting)1  
Storage & operating temperature  
Ta = 25 ˚C  
Ta = 70 ˚C  
-
-
2
1.3  
150  
W
W
˚C  
Tstg, Tj  
- 55  
1 Surface mounted on FR4 board, t 10 sec  
January 1999  
1
Rev 1.000  

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