DATA SHEET
www.onsemi.com
MOSFET - Power, Single,
N-Channel
V
R
MAX
I MAX
D
(BR)DSS
DS(on)
80 V
55 mW @ 10 V
13 A
80 V, 55 mW, 13 A
N−Channel
D (5 − 8)
NVTFS6H888N
Features
• Small Footprint (3.3 x 3.3 mm) for Compact Design
G (4)
• Low R
to Minimize Conduction Losses
DS(on)
• Low Capacitance to Minimize Driver Losses
• NVTFS6H888NWF − Wettable Flanks Product
• AEC−Q101 Qualified and PPAP Capable
S (1, 2, 3)
• These Devices are Pb−Free and are RoHS Compliant
1
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
WDFN8 3.3x3.3, 0.65P
CASE 511AB
J
Parameter
Drain−to−Source Voltage
Symbol
Value
80
Unit
V
V
DSS
Gate−to−Source Voltage
V
GS
20
V
Continuous Drain
Current R
T
= 25°C
I
12
A
C
D
WDFNW8 3.3x3.3, 0.65P (Full−Cut m8FL WF)
q
JC
T
C
= 100°C
8.3
(Notes 1, 2, 3, 4)
CASE 515AN
Steady
State
Power Dissipation
T
C
= 25°C
P
18
9.2
4.7
W
A
D
R
(Notes 1, 2, 3)
q
JC
T
C
= 100°C
MARKING DIAGRAM
Continuous Drain
Current R
T = 25°C
A
I
D
1
q
JA
S
S
S
G
D
D
D
D
T = 100°C
A
3.3
(Notes 1, 3, 4)
Steady
State
XXXX
AYWWG
G
Power Dissipation
T = 25°C
A
P
2.9
1.5
47
W
D
R
(Notes 1, 3)
q
JA
T = 100°C
A
Pulsed Drain Current
T = 25°C, t = 10 ms
I
DM
A
A
p
XXXX = Specific Device Code
Operating Junction and Storage Temperature
Range
T , T
−55 to
°C
J
stg
A
Y
= Assembly Location
= Year
+175
Source Current (Body Diode)
I
S
15
47
A
WW
G
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
Single Pulse Drain−to−Source Avalanche
E
AS
mJ
Energy (I
= 0.6 A)
L(pk)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
Parameter
Symbol
Value
8.2
Unit
Junction−to−Case − Steady State (Note 3)
Junction−to−Ambient − Steady State (Note 3)
R
°C/W
q
JC
R
51.5
q
JA
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
2
3. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
4. Continuous DC current rating. Maximum current for pulses as long as 1
second is higher but is dependent on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
April, 2022 − Rev. 2
NVTFS6H888N/D