5秒后页面跳转
捷配首页

Datasheet > NSBMC096VF25
NSBMC096VF25 PDF预览

NSBMC096VF25

更新时间： 2024-11-15 19:53:55
品牌 Logo 应用领域
德州仪器 - TI 时钟动态存储器外围集成电路
页数 文件大小 规格书
18页 477K
描述
16MX1, DRAM CONTROLLER, PQFP132, PLASTIC, QFP-132

阅读下载

中文翻译

获取价格

NSBMC096VF25 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：GQFP, SPQFP132,1.1SQReach Compliance Code：unknown
风险等级：5.92地址总线宽度：29
边界扫描：NO总线兼容性：I960CA; I960CF
最大时钟频率：25 MHz外部数据总线宽度：
JESD-30 代码：S-PQFP-G132JESD-609代码：e0
长度：24.13 mm低功率模式：NO
内存组织：16M X 1区块数量：4
端子数量：132最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：GQFP封装等效代码：SPQFP132,1.1SQ
封装形状：SQUARE封装形式：FLATPACK, GUARD RING
电源：5 V认证状态：Not Qualified
座面最大高度：4.45 mm子类别：Memory Controllers
最大压摆率：100 mA最大供电电压：5.5 V
最小供电电压：4.5 V标称供电电压：5 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.8 mm
端子位置：QUAD宽度：24.13 mm
uPs/uCs/外围集成电路类型：MEMORY CONTROLLER, DRAMBase Number Matches：1

NSBMC096VF25 数据手册

 浏览型号NSBMC096VF25的Datasheet PDF文件第2页浏览型号NSBMC096VF25的Datasheet PDF文件第3页浏览型号NSBMC096VF25的Datasheet PDF文件第4页浏览型号NSBMC096VF25的Datasheet PDF文件第5页浏览型号NSBMC096VF25的Datasheet PDF文件第6页浏览型号NSBMC096VF25的Datasheet PDF文件第7页 
August 1993  
NSBMC096-16/-25/-33 Burst Memory Controller  
General Description  
The NSBMC096 Burst Memory Controller is an integrated  
The NSBMC096 has been designed to allow maximum flexi-  
bility in its application. The full range of processor speeds is  
supported for a wide range of DRAM speeds, sizes and or-  
ganizations.  
circuit which implements all aspects of DRAM control for  
CA/CF  
high performance systems using an i960  
É
SuperScalar Embedded Processor. The NSBMC096 is func-  
tionally equivalent to the V96BMCTM  
.
No glue logic is required because the bus interface is cus-  
tomized to the i960 CA/CF. System integration is further  
enhanced by providing a 24-bit heartbeat timer and a bus  
watch timer on-chip.  
The extremely high instruction rate achieved by these proc-  
essors place extraordinary demands on memory system de-  
sign if maximum throughput is to be sustained and costs  
minimized.  
The NSBMC096 is packaged as a 132-pin PQFP with a foot-  
print of only 1.3 square inches. It reduces plexi-  
ty, space requirements and is fully derate, tem-  
perature and voltage.  
Static RAM offers a simple solution for high speed memory  
systems. However, high cost and low density make this an  
expensive and space consumptive choice.  
Dynamic RAMs are an attractive alternative with higher den-  
sity and low cost. Their drawbacks are, slower access time  
and more complex control circuitry required to operate  
them.  
Features  
Y
Interfaces directly to the i960 C
Y
Integrated Page Cache Manageme
Y
The access time problem is solved if DRAMs are used in  
page mode. In this mode, access times rival that of static  
RAM. The control circuit problem is resolved by the  
NSBMC096.  
Manages Page Moc Memoces  
Y
On-chip Memory ltiplexer/Drivers  
Y
Supts DRAMkB t64 MB  
Y
Bit cour/timer  
The function that the NSBMC096 performs is to optimally  
translate the burst access protocol of the i960 CA/CF to the  
page mode access protocol supported by dynamic RAMs.  
Y
Non-interled or way intleaved operation  
Y
5-Bit Bus WaTimer  
Y
So-configd operational parameters  
The device manages one or two-way interleaved arrange-  
ments of DRAMs such that during burst access, data can be  
read, or written, at the rate of one word per system clock  
cycle.  
Y
Low Per CMOS technology  
Block Diagram  
TL/V/11805–1  
This document contains information concerning a product that has been developed by National Semiconductor Corporation/V3 Corporation. This information  
is intended to help in evaluating this product. National Semiconductor Corporation/V3 Corporation reserves the right to change and improve the specifications  
of this product without notice.  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
NSBMC096TM and WATCHDOGTM are trademarks of National Semiconductor Corporation.  
i960É is a registered trademark of Intel Corporation.  
V96BMCTM is a trademark of V3 Corporation.  
C
1995 National Semiconductor Corporation  
TL/V/11805  
RRD-B30M115/Printed in U. S. A.  
1234567...18

中文翻译

下载PDF

与NSBMC096VF25相关器件

型号 品牌 获取价格 描述 数据表
NSBMC096VF-25 ETC

获取价格

 		DRAM Controller
NSBMC096VF30 NSC

获取价格

 		IC 64M X 1, DRAM CONTROLLER, PQFP132, PLASTIC, QFP-132, Memory Controller
NSBMC096VF-33 ETC

获取价格

 		DRAM Controller
NSBMC096VF-33C NSC

获取价格

 		IC,MEMORY CONTROLLER,CMOS,QFP,132PIN
NSBMC290 ETC

获取价格
NSBMC290-16 NSC

获取价格

 		Burst Mode Memory Controller
NSBMC290UP NSC

获取价格

 		Burst Mode Memory Controller
NSBMC290UP-16 ETC

获取价格

 		DRAM Controller
NSBMC290UP-20 ETC

获取价格

 		DRAM Controller
NSBMC290UP-25 ETC

获取价格

 		DRAM Controller

与NSBMC096VF25相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证