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NSBMC292VF-33 PDF预览

NSBMC292VF-33

更新时间： 2024-11-15 21:19:35
品牌 Logo 应用领域
美国国家半导体 - NSC 动态存储器外围集成电路
页数 文件大小 规格书
18页 299K
描述
IC DRAM CONTROLLER, PQFP132, PLASTIC, QFP-132, Memory Controller

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NSBMC292VF-33 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：BQFP, SPQFP132,1.1SQReach Compliance Code：unknown
风险等级：5.92地址总线宽度：32
边界扫描：NO外部数据总线宽度：
JESD-30 代码：S-PQFP-G132JESD-609代码：e0
长度：24.13 mm低功率模式：NO
区块数量：4端子数量：132
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：BQFP
封装等效代码：SPQFP132,1.1SQ封装形状：SQUARE
封装形式：FLATPACK, BUMPER峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5 V认证状态：Not Qualified
座面最大高度：4.45 mm子类别：Memory Controllers
最大压摆率：100 mA最大供电电压：5.5 V
最小供电电压：4.5 V标称供电电压：5 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.64 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：24.13 mmuPs/uCs/外围集成电路类型：MEMORY CONTROLLER, DRAM
Base Number Matches：1

NSBMC292VF-33 数据手册

 浏览型号NSBMC292VF-33的Datasheet PDF文件第2页浏览型号NSBMC292VF-33的Datasheet PDF文件第3页浏览型号NSBMC292VF-33的Datasheet PDF文件第4页浏览型号NSBMC292VF-33的Datasheet PDF文件第5页浏览型号NSBMC292VF-33的Datasheet PDF文件第6页浏览型号NSBMC292VF-33的Datasheet PDF文件第7页 
August 1993  
NSBMC292TM-16/-25/-33 Burst Memory Controller  
General Description  
The NSBMC292 Burst Memory Controller is an integrated  
circuit which implements all aspects of DRAM control for  
high performance systems using an Am29030TM or  
Am29035 Processor. The NSBMC292 is functionally equiva-  
of one word per two cycles for non-interleaved, per cycle for  
two-way interleaved.  
The NSBMC292 has been designed to allow maximum flexi-  
bility in its application. The full range of processor speeds is  
supported for a wide range of DRAM speeds, sizes and or-  
ganizations.  
lent to the V292BMCTM  
.
The on-chip I-cache of these processors serves to partially  
decouple throughput from the performance of main memo-  
ry, however, a sophisticated memory design is still required  
for optimum performance.  
Because the bus interface is customized to the  
Am29030/35, no glue logic is required. Integration is further  
enhanced by providing on-chip, a 24-bit timer and a 5-bit  
bus time-out monitor.  
Static RAM offers a simple solution. Unfortunately, this solu-  
tion is relatively expensive and space consumptive because  
of low bit density per device and high cost per bit.  
The NSBMC292 is packaged as a 132-pin PQFP with a foot-  
print of only 1.3 square inches. It reduces design complexi-  
ty, space requirements and is fully derated for loading, tem-  
perature and voltage.  
From a cost and density point of view, Dynamic RAM is an  
attractive alternative. The drawbacks are relatively slow ac-  
cess times and the complexity of the control circuitry re-  
quired to operate them.  
Features  
Y
The access time problem is solved if the DRAM is used in  
page mode. In this mode, access times rival that of static  
RAM. The control circuit problem is resolved by the  
NSBMC292.  
Interfaces directly to the Am29030/35  
Y
Manages page mode dynamic memory devices  
Y
Supports DRAMs from 256 kbits to 64 MB  
Y
Non-interleaved or two way interleaved operation  
The function that the NSBMC292 performs is to optimally  
translate the burst access protocol of the Am29030/35 to  
the page mode access protocol supported by dynamic  
RAMs.  
Y
Software-configured operational parameters  
Y
Integrated page cache management  
Y
On-Chip memory address multiplexer/drivers  
Y
24-Bit counter/timer  
One or two-way interleaved arrangements of DRAMs are  
supported. During burst access, data is accessed at the rate  
Y
5-Bit bus watch timer  
Y
High-speed/low power CMOS technology  
Block Diagram  
TL/V/11806–1  
Typical System Configuration  
This document contains information concerning a product that has been developed by National Semiconductor Corporation/V3 Corp. This information is  
intended to help in evaluating this product. National Semiconductor Corporation/V3 Corp. reserves the right to change and improve the specifications of this  
product without notice.  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
NSBMC292TM and WATCHDOGTM are trademarks of National Semiconductor Corporation.  
Am29030TM is a trademark of Advanced Micro Devices, Sunnyvale, California, U.S.A.  
V292BMCTM is a trademark of V3 Corporation.  
C
1995 National Semiconductor Corporation  
TL/V/11806  
RRD-B30M115/Printed in U. S. A.  
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