Datasheet > NSBMC292

NSBMC292

更新时间： 2024-01-05 06:08:39

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其他 - ETC		/
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NSBMC292 数据手册

August 1993

NSBMC292^TM-16/-25/-33 Burst Memory Controller

General Description

The NSBMC292 Burst Memory Controller is an integrated

circuit which implements all aspects of DRAM control for

high performance systems using an Am29030^TMor

Am29035 Processor. The NSBMC292 is functionally equiva-

of one word per two cycles for non-interleaved, per cycle for

two-way interleaved.

The NSBMC292 has been designed to allow maximum flexi-

bility in its application. The full range of processor speeds is

supported for a wide range of DRAM speeds, sizes and or-

ganizations.

lent to the V292BMC^TM

The on-chip I-cache of these processors serves to partially

decouple throughput from the performance of main memo-

ry, however, a sophisticated memory design is still required

for optimum performance.

Because the bus interface is customized to the

Am29030/35, no glue logic is required. Integration is further

enhanced by providing on-chip, a 24-bit timer and a 5-bit

bus time-out monitor.

Static RAM offers a simple solution. Unfortunately, this solu-

tion is relatively expensive and space consumptive because

of low bit density per device and high cost per bit.

The NSBMC292 is packaged as a 132-pin PQFP with a foot-

print of only 1.3 square inches. It reduces design complexi-

ty, space requirements and is fully derated for loading, tem-

perature and voltage.

From a cost and density point of view, Dynamic RAM is an

attractive alternative. The drawbacks are relatively slow ac-

cess times and the complexity of the control circuitry re-

quired to operate them.

Features

The access time problem is solved if the DRAM is used in

page mode. In this mode, access times rival that of static

RAM. The control circuit problem is resolved by the

NSBMC292.

Interfaces directly to the Am29030/35

Manages page mode dynamic memory devices

Supports DRAMs from 256 kbits to 64 MB

Non-interleaved or two way interleaved operation

The function that the NSBMC292 performs is to optimally

translate the burst access protocol of the Am29030/35 to

the page mode access protocol supported by dynamic

RAMs.

Software-configured operational parameters

Integrated page cache management

On-Chip memory address multiplexer/drivers

24-Bit counter/timer

One or two-way interleaved arrangements of DRAMs are

supported. During burst access, data is accessed at the rate

5-Bit bus watch timer

High-speed/low power CMOS technology

Block Diagram

TL/V/11806–1

Typical System Configuration

This document contains information concerning a product that has been developed by National Semiconductor Corporation/V3 Corp. This information is

intended to help in evaluating this product. National Semiconductor Corporation/V3 Corp. reserves the right to change and improve the specifications of this

product without notice.

TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.

NSBMC292^TMand WATCHDOG^TMare trademarks of National Semiconductor Corporation.

Am29030^TMis a trademark of Advanced Micro Devices, Sunnyvale, California, U.S.A.

V292BMC^TMis a trademark of V3 Corporation.

1995 National Semiconductor Corporation

TL/V/11806

RRD-B30M115/Printed in U. S. A.

12 3 4 5 6 7...18

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与NSBMC292相关器件

型号	品牌	获取价格	描述	数据表
NSBMC292VF-16	NSC	获取价格	IC DRAM CONTROLLER, PQFP132, PLASTIC, QFP-132, Memory Controller
NSBMC292VF-25	TI	获取价格	DRAM CONTROLLER, PQFP132, PLASTIC, QFP-132
NSBMC292VF-33	NSC	获取价格	IC DRAM CONTROLLER, PQFP132, PLASTIC, QFP-132, Memory Controller
NSBMC292VF-33	TI	获取价格	DRAM CONTROLLER, PQFP132, PLASTIC, QFP-132
NSBP-108	MINI	获取价格	Band Reject Filter
NSBP-108+	MINI	获取价格	Band Reject Filter, 89MHz Min, 105MHz Max, ROHS COMPLIANT, CASE FF967
NSBXT	VISHAY	获取价格	Glass Passivated General Purpose Plastic Rectifier
NSC-006-2MC-05-S	CUI	获取价格	Optical Position Encoder, ROTARY OPTICAL POSITION ENCODER
NSC-006-2MC-125-S	CUI	获取价格	Optical Position Encoder, ROTARY OPTICAL POSITION ENCODER
NSC-006-2MD-05-S	CUI	获取价格	Optical Position Encoder, ROTARY OPTICAL POSITION ENCODER

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