Datasheet > NLV74HC138ADR2G

NLV74HC138ADR2G

更新时间： 2024-09-14 01:15:47

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
10页	142K
描述
1-of-8 Decoder/ Demultiplexer

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数据手册

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NLV74HC138ADR2G 数据手册

MC74HC138A

1-of-8 Decoder/

Demultiplexer

High−Performance Silicon−Gate CMOS

The MC74HC138A is identical in pinout to the LS138. The device

inputs are compatible with standard CMOS outputs; with pullup

resistors, they are compatible with LSTTL outputs.

The HC138A decodes a three−bit Address to one−of−eight

active−low outputs. This device features three Chip Select inputs, two

active−low and one active−high to facilitate the demultiplexing,

cascading, and chip−selecting functions. The demultiplexing function

is accomplished by using the Address inputs to select the desired

device output; one of the Chip Selects is used as a data input while the

other Chip Selects are held in their active states.

http://onsemi.com

MARKING

DIAGRAMS

PDIP−16

N SUFFIX

CASE 648

MC74HC138AN

AWLYYWWG

Features

SOIC−16

D SUFFIX

CASE 751B

HC138AG

AWLYWW

• Output Drive Capability: 10 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS and TTL

• Operating Voltage Range: 2.0 to 6.0 V

• Low Input Current: 1.0 mA

• High Noise Immunity Characteristic of CMOS Devices

TSSOP−16

DT SUFFIX

CASE 948F

138A

ALYWG

• In Compliance with the Requirements Defined by JEDEC

Standard No. 7 A

• Chip Complexity: 100 FETs or 29 Equivalent Gates

• NLV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC−Q100

Qualified and PPAP Capable

L, WL

Y, YY

= Assembly Location

= Wafer Lot

= Year

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

W, WW = Work Week

Compliant

G or G

= Pb−Free Package

(Note: Microdot may be in either location)

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 2 of this data sheet.

Publication Order Number:

July, 2012 − Rev. 12

MC74HC138A/D

12 3 4 5 6 7...10

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