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NDT455N(J23Z) PDF预览

NDT455N(J23Z)

更新时间: 2024-01-27 12:44:58
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 晶体晶体管
页数 文件大小 规格书
10页 229K
描述
TRANSISTOR | MOSFET | N-CHANNEL | 30V V(BR)DSS | 11.5A I(D) | SOT-223

NDT455N(J23Z) 数据手册

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July 1996  
NDT455N  
N-Channel Enhancement Mode Field Effect Transistor  
General Description  
Features  
11.5 A, 30 V. RDS(ON) = 0.015 W @ VGS = 10 V  
These N-Channel logic level enhancement mode power field  
effect transistors are produced using Fairchild's proprietary, high  
cell density, DMOS technology. This very high density process  
is especially tailored to minimize on-state resistance, provide  
superior switching performance, and withstand high energy  
pulses in the avalanche and commutation modes. These devices  
are particularly suited for low voltage applications such as DC  
motor control and DC/DC conversion where fast switching, low  
in-line power loss, and resistance to transients are needed.  
RDS(ON) = 0.02 W @ VGS = 4.5 V.  
High density cell design for extremely low RDS(ON)  
.
High power and current handling capability in a widely used  
surface mount package.  
________________________________________________________________________________  
D
D
D
S
G
S
G
Absolute Maximum Ratings TA = 25°C unless otherwise noted  
Symbol Parameter  
NDT455N  
Units  
VDSS  
VGSS  
ID  
Drain-Source Voltage  
Gate-Source Voltage  
30  
20  
V
V
A
Drain Current  
- Continuous  
- Pulsed  
(Note 1a)  
(Note 1a)  
± 11.5  
± 40  
Maximum Power Dissipation  
3
W
PD  
(Note 1b)  
(Note 1c)  
1.3  
1.1  
TJ,TSTG  
Operating and Storage Temperature Range  
-65 to 150  
°C  
THERMAL CHARACTERISTICS  
Thermal Resistance, Junction-to-Ambient  
Thermal Resistance, Junction-to-Case  
(Note 1a)  
(Note 1)  
42  
12  
°C/W  
°C/W  
R
JA  
q
R
JC  
q
© 1997 Fairchild Semiconductor Corporation  
NDT455N Rev.F  

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