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NCP5392MNR2G

更新时间： 2024-09-19 10:28:03
品牌 Logo 应用领域
安森美 - ONSEMI 稳压器开关式稳压器或控制器电源电路开关式控制器
页数 文件大小 规格书
32页 308K
描述
2/3/4-Phase Controller for CPU Applications

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中文翻译

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NCP5392MNR2G 技术参数

是否无铅： 不含铅生命周期：End Of Life
零件包装代码：QFN包装说明：HVQCCN, LCC40,.24SQ,20
针数：40Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
Factory Lead Time：1 week风险等级：5.69
Is Samacsys：N模拟集成电路 - 其他类型：SWITCHING CONTROLLER
控制模式：VOLTAGE-MODE控制技术：PULSE WIDTH MODULATION
最大输入电压：5.25 V最小输入电压：4.75 V
标称输入电压：5 VJESD-30 代码：S-XQCC-N40
JESD-609代码：e3长度：6 mm
湿度敏感等级：1功能数量：1
端子数量：40最高工作温度：85 °C
最低工作温度：封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装等效代码：LCC40,.24SQ,20
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
座面最大高度：1 mm子类别：Switching Regulator or Controllers
表面贴装：YES切换器配置：PUSH-PULL
最大切换频率：1000 kHz温度等级：OTHER
端子面层：Tin (Sn)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：6 mm
Base Number Matches：1

NCP5392MNR2G 数据手册

 浏览型号NCP5392MNR2G的Datasheet PDF文件第2页浏览型号NCP5392MNR2G的Datasheet PDF文件第3页浏览型号NCP5392MNR2G的Datasheet PDF文件第4页浏览型号NCP5392MNR2G的Datasheet PDF文件第5页浏览型号NCP5392MNR2G的Datasheet PDF文件第6页浏览型号NCP5392MNR2G的Datasheet PDF文件第7页 
NCP5392  
2/3/4-Phase Controller for  
CPU Applications  
The NCP5392 provides up to a four−phase buck solution which  
combines differential voltage sensing, differential phase current  
sensing, and adaptive voltage positioning to provide accurately  
regulated power for both Intel and AMD processors. Dual−edge  
pulse−width modulation (PWM) combined with inductor current  
sensing reduces system cost by providing the fastest initial response  
to dynamic load events. Dual−edge multiphase modulation reduces  
the total bulk and ceramic output capacitance required to meet  
transient regulation specifications.  
http://onsemi.com  
MARKING  
DIAGRAM  
1
A high performance operational error amplifier is provided to  
simplify compensation of the system. Dynamic Reference Injection  
further simplifies loop compensation by eliminating the need to  
compromise between closed−loop transient response and Dynamic  
VID performance.  
1
40  
NCP5392  
AWLYYWWG  
40 PIN QFN, 6x6  
MN SUFFIX  
CASE 488AR  
NCP5392 = Specific Device Code  
Features  
A
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= Pb−Free Package  
WL  
YY  
WW  
G
• Meets Intel’s VR11.1 Specifications  
• Meets AMD 6 Bit Code Specifications  
• Dual−edge PWM for Fastest Initial Response to Transient Loading  
• High Performance Operational Error Amplifier  
• Internal Soft Start  
• Dynamic Reference Injection (Patent #US07057381)  
• DAC Range from 0.375 V to 1.6 V  
• DAC Feed Forward (Patent Pending)  
*Pin 41 is the thermal pad on the bottom of the device.  
®
ORDERING INFORMATION  
†
Device  
Package  
Shipping  
NCP5392MNR2G* QFN−40  
(Pb−Free)  
2500/Tape & Reel  
•
0.5% DAC Voltage Accuracy from 1.0 V to 1.6 V  
• True Differential Remote Voltage Sensing Amplifier  
• Phase−to−Phase Current Balancing  
*TemperatureRange: 0°C to 85°C  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
• “Lossless” Differential Inductor Current Sensing  
• Differential Current Sense Amplifiers for each Phase  
• Adaptive Voltage Positioning (AVP)  
• Oscillator Frequency Range of 100 kHz – 1 MHz  
• Latched Over Voltage Protection (OVP)  
• Guaranteed Startup into Pre−Charged Loads  
• Threshold Sensitive Enable Pin for VTT Sensing  
• Power Good Output with Internal Delays  
• Thermally Compensated Current Monitoring  
• This is a Pb−Free Device  
Applications  
• Desktop Processors  
©
Semiconductor Components Industries, LLC, 2008  
1
Publication Order Number:  
August, 2008 − Rev. 3  
NCP5392/D  
1234567...32

中文翻译

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NCP5392MNR2G 替代型号

型号 品牌 替代类型 描述 数据表
NCP5392PMNR2G ONSEMI

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