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NCP5395MNR2G

更新时间： 2024-11-27 11:15:23
品牌 Logo 应用领域
安森美 - ONSEMI 驱动控制器开关驱动器
页数 文件大小 规格书
30页 335K
描述
2/3/4 相控制器，带门极驱动器

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中文翻译

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NCP5395MNR2G 技术参数

是否无铅： 不含铅生命周期：Obsolete
零件包装代码：QFN包装说明：HVQCCN,
针数：48Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
Factory Lead Time：1 week风险等级：5.63
模拟集成电路 - 其他类型：DUAL SWITCHING CONTROLLER控制技术：PULSE WIDTH MODULATION
最大输入电压：5.25 V最小输入电压：4.75 V
JESD-30 代码：S-XQCC-N48JESD-609代码：e3
长度：7 mm湿度敏感等级：1
功能数量：1端子数量：48
最高工作温度：70 °C最低工作温度：
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
座面最大高度：1 mm表面贴装：YES
切换器配置：PUSH-PULL最大切换频率：1100 kHz
温度等级：COMMERCIAL端子面层：Tin (Sn)
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7 mmBase Number Matches：1

NCP5395MNR2G 数据手册

 浏览型号NCP5395MNR2G的Datasheet PDF文件第2页浏览型号NCP5395MNR2G的Datasheet PDF文件第3页浏览型号NCP5395MNR2G的Datasheet PDF文件第4页浏览型号NCP5395MNR2G的Datasheet PDF文件第5页浏览型号NCP5395MNR2G的Datasheet PDF文件第6页浏览型号NCP5395MNR2G的Datasheet PDF文件第7页 
NCP5395  
Product Preview  
2/3/4-Phase Controller with  
On Board Gate Drivers for  
CPU Applications  
The NCP5395 provides up to a four−phase buck solution which  
combines differential voltage sensing, differential phase current  
sensing, adaptive voltage positioning, and on board gate drivers.  
Dual−edge pulse−width modulation (PWM) combined with inductor  
current sensing reduces system cost by providing the fastest initial  
response to dynamic load events. Dual−edge multiphase modulation  
reduces the total bulk and ceramic output capacitance required to meet  
transient regulation specifications.  
http://onsemi.com  
1
48  
QFN48  
CASE 485K  
PLASTIC  
The on board gate drivers includes adaptive non overlap and power  
saving operation. A high performance operational error amplifier is  
provided to simplify compensation of the system. Patented Dynamic  
Reference Injection further simplifies loop compensation by  
eliminating the need to compromise between closed−loop transient  
MARKING DIAGRAM  
48  
response and Dynamic V performance.  
1
ID  
Features  
NCP5395  
AWLYYWWG  
• Meets Intel’s VR11.1 Specifications  
• Meets AMD 6 Bit Code Specifications  
• Dual−edge PWM for Fastest Initial Response to Transient Loading  
• High Performance Operational Error Amplifier  
• Internal Soft Start  
A
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= Pb−Free Package  
WL  
YY  
WW  
G
• Dynamic Reference Injection (Patent #US07057381)  
• DAC Range from 0.5 V to 1.6 V  
• DAC Feed Forward Function (Patient Pending)  
•
0.5% DAC Voltage Accuracy from 1.0 V to 1.6 V  
48  
• True Differential Remote Voltage Sensing Amplifier  
• Phase−to−Phase Current Balancing  
1
BG1  
BG3  
PSI  
G4  
VID0  
VRRDY  
EN  
• “Lossless” Differential Inductor Current Sensing  
• Differential Current Sense Amplifiers for Each Phase  
• Adaptive Voltage Positioning (AVP)  
• Oscillator Frequency Range of 125 kHz − 1 MHz  
• Latched Over Voltage Protection (OVP)  
VID1  
CS1N  
CS1P  
CS2N  
CS2P  
CS3N  
CS3P  
CS4N  
CS4P  
VID2  
AGND  
Down−bonded to  
Exposed Flag  
VID3  
VID4  
VID5  
VID6  
VID7/AMD  
ROSC  
ILIM  
• Guaranteed Startup into Pre−Charged Loads  
• Threshold Sensitive Enable Pin for VTT Sensing  
• Power Good Output with Internal Delays  
• Thermally Compensated Current Monitoring  
• Thermal Shutdown Protection  
ORDERING INFORMATION  
†
• Adaptive−Non−Overlap Gate Drive Circuit  
• Output Disable Control Turn Off of Both Phase Pair MOSFETs  
Device  
NCP5395MNR2G  
Package  
Shipping  
QFN48  
2500/Tape & Reel  
• This is a Pb−Free Device  
(Pb−Free)  
Applications  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
• Desktop Processors  
This document contains information on a product under development. ON Semiconductor  
reserves the right to change or discontinue this product without notice.  
©
Semiconductor Components Industries, LLC, 2008  
1
Publication Order Number:  
July, 2008 − Rev. P5  
NCP5395/D  
1234567...30

中文翻译

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