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NCP5424ADR2 PDF预览

NCP5424ADR2

更新时间： 2024-09-20 01:22:43
品牌 Logo 应用领域
安森美 - ONSEMI 开关光电二极管
页数 文件大小 规格书
20页 134K
描述
Dual Synchronous Buck Controller

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中文翻译

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NCP5424ADR2 技术参数

是否无铅： 含铅生命周期：Obsolete
零件包装代码：SOIC包装说明：SOP, SOP16,.25
针数：16Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.73模拟集成电路 - 其他类型：DUAL SWITCHING CONTROLLER
控制模式：VOLTAGE-MODE控制技术：PULSE WIDTH MODULATION
最大输入电压：13.2 V最小输入电压：10.8 V
标称输入电压：12 VJESD-30 代码：R-PDSO-G16
JESD-609代码：e0长度：9.9 mm
湿度敏感等级：1功能数量：1
端子数量：16最高工作温度：70 °C
最低工作温度：最大输出电流：1.5 A
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP16,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE认证状态：Not Qualified
座面最大高度：1.75 mm子类别：Switching Regulator or Controllers
表面贴装：YES切换器配置：PUSH-PULL
最大切换频率：750 kHz温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
宽度：3.9 mmBase Number Matches：1

NCP5424ADR2 数据手册

 浏览型号NCP5424ADR2的Datasheet PDF文件第2页浏览型号NCP5424ADR2的Datasheet PDF文件第3页浏览型号NCP5424ADR2的Datasheet PDF文件第4页浏览型号NCP5424ADR2的Datasheet PDF文件第5页浏览型号NCP5424ADR2的Datasheet PDF文件第6页浏览型号NCP5424ADR2的Datasheet PDF文件第7页 
NCP5424A  
Dual Synchronous  
Buck Controller with Input  
Current Sharing  
The NCP5424A is a flexible dual N−channel synchronous buck  
2
controller utilizing V  
control for fast transient response and  
http://onsemi.com  
excellent line and load regulation. This highly versatile controller can  
be configured as a single two phase output converter that draws  
programmable amounts of current from two different input voltages or  
all current from one supply. The NCP5424A can also be configured as  
two independent out−of−phase controllers.  
SO−16  
D SUFFIX  
CASE 751B  
16  
1
Using the NCP5424A in a current sharing input configuration is  
ideal for applications where more power is required than is available  
from one supply, such as video cards or other plug−in boards. When  
configured as a dual output controller, the output of one controller can  
be divided down and used as the reference for the second controller.  
This tracking capability is useful in applications such as Double Data  
Rate (DDR) Memory power where the termination voltage must track  
VDD.  
PIN CONNECTIONS AND  
MARKING DIAGRAM  
1
16  
GATE(H)1  
GATE(L)1  
GND  
GATE(H)2  
GATE(L)2  
V
CC  
BST  
R
OSC  
The NCP5424A provides a cycle−to−cycle current limit allowing  
the system to handle transient overcurrent events. In addition, the  
NCP5424A provides Soft Start, undervoltage lockout, and built−in  
adaptive FET nonoverlap time to prevent shoot through.  
IS+1  
IS+2  
V
V
FB−2  
IS−  
FB+2  
V
FB1  
COMP1  
COMP2  
Features  
A
= Assembly Location  
= Year  
• Cycle−to−Cycle Current Limit  
• Programmable Soft Start  
• 100% Duty Cycle for Enhanced Transient Response  
• 150 kHz to 600 kHz Programmable Frequency Operation  
WL = Wafer Lot  
Y
WW = Work Week  
• Switching Frequency Set by Single Resistor  
• Out−Of−Phase Synchronization Between the Channels Reduces the  
Input Filter Requirement  
ORDERING INFORMATION  
Device  
Package  
SO−16  
SO−16  
Shipping  
• Undervoltage Lockout  
Applications  
48 Units/Rail  
NCP5424AD  
2500 Tape & Reel  
NCP5424ADR2  
• Video Graphics Card  
• DDR Memory  
• High Current (Two−Phase) Power Supplies  
• Dual Output DC−DC Converters  
Semiconductor Components Industries, LLC, 2003  
1
Publication Order Number:  
August, 2003 − Rev. 0  
NCP5424A/D  
1234567...20

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