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NCP5109ADR2G PDF预览

NCP5109ADR2G

更新时间: 2024-11-24 00:59:19
品牌 Logo 应用领域
安森美 - ONSEMI 驱动光电二极管接口集成电路
页数 文件大小 规格书
18页 120K
描述
High Voltage, High and Low Side Driver

NCP5109ADR2G 技术参数

是否无铅: 不含铅生命周期:Active
包装说明:SOP, SOP8,.25针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:7 weeks
风险等级:1.43内置保护:UNDER VOLTAGE
接口集成电路类型:HALF BRIDGE BASED PERIPHERAL DRIVERJESD-30 代码:R-PDSO-G8
JESD-609代码:e3长度:4.9 mm
湿度敏感等级:1功能数量:1
端子数量:8最高工作温度:125 °C
最低工作温度:-40 °C输出电流流向:SOURCE AND SINK
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:15 V认证状态:Not Qualified
座面最大高度:1.75 mm子类别:MOSFET Drivers
标称供电电压:15 V表面贴装:YES
温度等级:AUTOMOTIVE端子面层:Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
断开时间:0.17 µs接通时间:0.17 µs
宽度:3.9 mmBase Number Matches:1

NCP5109ADR2G 数据手册

 浏览型号NCP5109ADR2G的Datasheet PDF文件第2页浏览型号NCP5109ADR2G的Datasheet PDF文件第3页浏览型号NCP5109ADR2G的Datasheet PDF文件第4页浏览型号NCP5109ADR2G的Datasheet PDF文件第5页浏览型号NCP5109ADR2G的Datasheet PDF文件第6页浏览型号NCP5109ADR2G的Datasheet PDF文件第7页 
NCP5109A, NCP5109B  
High Voltage, High and Low  
Side Driver  
The NCP5109 is a high voltage gate driver IC providing two  
outputs for direct drive of 2 N−channel power MOSFETs or IGBTs  
arranged in a half−bridge configuration version B or any other  
high−side + low−side configuration version A.  
www.onsemi.com  
It uses the bootstrap technique to ensure a proper drive of the  
high−side power switch. The driver works with 2 independent inputs.  
MARKING  
DIAGRAMS  
Features  
High Voltage Range: Up to 200 V  
dV/dt Immunity 50 V/nsec  
Negative Current Injection Characterized Over the Temperature Range  
Gate Drive Supply Range from 10 V to 20 V  
High and Low Drive Outputs  
8
SOIC−8  
D SUFFIX  
CASE 751  
5109x  
ALYW  
1
G
1
Output Source / Sink Current Capability 250 mA / 500 mA  
3.3 V and 5 V Input Logic Compatible  
DFN10  
MN SUFFIX  
CASE 506DH  
5109x  
ALYWG  
G
Up to V Swing on Input Pins  
CC  
Extended Allowable Negative Bridge Pin Voltage Swing to −10 V  
for Signal Propagation  
5109 = Specific Device Code  
x
A
L
Y
W
G
= A or B version  
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= Pb−Free Package  
Matched Propagation Delays Between Both Channels  
Outputs in Phase with the Inputs  
Independent Logic Inputs to Accommodate All Topologies (Version A)  
Cross Conduction Protection with 100 ns Internal Fixed Dead Time  
(Version B)  
(Note: Microdot may be in either location)  
Under V LockOut (UVLO) for Both Channels  
CC  
Pin−to−Pin Compatible with Industry Standards  
These are Pb−Free Devices  
PINOUT INFORMATION  
VBOOT  
DRV_HI  
BRIDGE  
DRV_LO  
VCC  
IN_HI  
IN_LO  
GND  
1
2
3
4
8
7
6
5
Typical Applications  
Half−Bridge Power Converters  
Any Complementary Drive Converters (Asymmetrical Half−Bridge,  
Active Clamp) (A Version Only).  
SOIC−8  
Full−Bridge Converters  
1
VCC  
IN_HI  
VBOOT  
NC  
DRV_HI  
NC  
IN_LO  
GND  
DRV_LO  
BRIDGE  
DFN−10  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 16 of  
this data sheet.  
©
Semiconductor Components Industries, LLC, 2017  
1
Publication Order Number:  
February, 2017 − Rev. 2  
NCP5109/D  

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