Datasheet > MT44K64M18RB-107E

MT44K64M18RB-107E

更新时间： 2024-11-22 14:58:59

品牌	Logo	应用领域
镁光 - MICRON		/
页数	文件大小	规格书
132页	1301K
描述
This tech note describes considerations in thermal applications for Micron memory devices, including thermal impedance, thermal resistance, junction temperature, operating temperature, memory reliability, reliability modeling, device reliability, and high-temperature electronics.

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Micron Confidential and Proprietary

4Gb, 8Gb, 16Gb: x8, x16 NAND Flash Memory

Features

NAND Flash Memory

MT29F4G08ABADAH4, MT29F4G08ABADAWP, MT29F4G08ABBDAH4,

MT29F4G08ABBDAHC, MT29F4G16ABADAH4, MT29F4G16ABADAWP,

MT29F4G16ABBDAH4, MT29F4G16ABBDAHC, MT29F8G08ADADAH4,

MT29F8G08ADBDAH4, MT29F8G16ADADAH4, MT29F8G16ADBDAH4,

MT29F16G08AJADAWP

• First block (block address 00h) is valid when ship-

ped from factory with ECC. For minimum required

ECC, see Error Management.

• Block 0 requires 1-bit ECC if PROGRAM/ERASE cy-

cles are less than 1000

Features

• Open NAND Flash Interface (ONFI) 1.0-compliant¹

• Single-level cell (SLC) technology

• Organization

– Page size x8: 2112 bytes (2048 + 64 bytes)

– Page size x16: 1056 words (1024 + 32 words)

– Block size: 64 pages (128K + 4K bytes)

– Plane size: 2 planes x 2048 blocks per plane

– Device size: 4Gb: 4096 blocks; 8Gb: 8192 blocks

16Gb: 16,384 blocks

• RESET (FFh) required as first command after pow-

er-on

• Alternate method of device initialization (Nand_In-

it) after power up (contact factory)

• Internal data move operations supported within the

plane from which data is read

• Quality and reliability

– Data retention: 10 years

– Endurance: 100,000 PROGRAM/ERASE cycles

• Operating voltage range

• Asynchronous I/O performance

–

^tRC/^tWC: 20ns (3.3V), 25ns (1.8V)

• Array performance

– Read page: 25µs ³

– Program page: 200µs (TYP: 1.8V, 3.3V)³

– Erase block: 700µs (TYP)

– V_CC: 2.7–3.6V

– V_CC: 1.7–1.95V

• Operating temperature:

• Command set: ONFI NAND Flash Protocol

• Advanced command set

– Commercial: 0°C to +70°C

– Industrial (IT): –40ºC to +85ºC

• Package

– Program page cache mode⁴

– Read page cache mode ⁴

– 48-pin TSOP type 1, CPL²

– 63-ball VFBGA

– One-time programmable (OTP) mode

– Two-plane commands ⁴

– Interleaved die (LUN) operations

– Read unique ID

– Block lock (1.8V only)

– Internal data move

• Operation status byte provides software method for

detecting

1. The ONFI 1.0 specification is available at

www.onfi.org.

Notes:

2. CPL = Center parting line.

3. See Program and Erase Characteristics for

^tR_ECC and ^tPROG_ECC specifications.

4. These commands supported only with ECC

disabled.

– Operation completion

– Pass/fail condition

– Write-protect status

• Ready/Busy# (R/B#) signal provides a hardware

method of detecting operation completion

• WP# signal: Write protect entire device

PDF: 09005aef83b25735

m60a_4gb_8gb_16gb_ecc_nand.pdf - Rev. N 10/12 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

Products and specifications discussed herein are subject to change by Micron without notice.

12 3 4 5 6 7...132

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