Datasheet > MT46H16M32LG

MT46H16M32LG

更新时间： 2025-07-19 12:28:39

品牌	Logo	应用领域
镁光 - MICRON		动态存储器双倍数据速率手机
页数	文件大小	规格书
96页	3106K
描述
512Mb: x16, x32 Mobile Low-Power DDR SDRAM Features

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中文翻译

获取价格

数据手册

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MT46H16M32LG 数据手册

512Mb: x16, x32 Mobile LPDDR SDRAM

Features

Mobile Low-Power DDR SDRAM

MT46H32M16LF – 8 Meg x 16 x 4 banks

MT46H16M32LF – 4 Meg x 32 x 4 banks

MT46H16M32LG – 4 Meg x 32 x 4 banks

Options

Marking

Features

• V_DD/V_DDQ= 1.70–1.95V

• V_DD/V_DDQ

– 1.8V/1.8V

• Configuration

• Bidirectional data strobe per byte of data (DQS)

• Internal, pipelined double data rate (DDR)

architecture; two data accesses per clock cycle

– 32 Meg x 16 (8 Meg x 16 x 4 banks)

– 16 Meg x 32 (4 Meg x 32 x 4 banks)

• Addressing

32M16

16M32

• Differential clock inputs (CK and CK#)

– JEDEC-standard addressing

• Commands entered on each positive CK edge

– Reduced page size¹

• DQS edge-aligned with data for READs; center-

aligned with data for WRITEs

• Plastic "green" package

– 60-ball VFBGA (8mm x 9mm)²

– 90-ball VFBGA (8mm x 13mm)³

• Timing – cycle time

– 5ns @ CL = 3 (200 MHz)

– 5.4ns @ CL = 3 (185 MHz)

– 6ns @ CL = 3 (166 MHz)

– 7.5ns @ CL = 3 (133 MHz)

• Power

• 4 internal banks for concurrent operation

• Data masks (DM) for masking write data; one mask

per byte

-5

-54

-6

• Programmable burst lengths (BL): 2, 4, 8, or 16

• Concurrent auto precharge option is supported

• Auto refresh and self refresh modes

• 1.8V LVCMOS-compatible inputs

• Temperature-compensated self refresh (TCSR)

• Partial-array self refresh (PASR)

-75

– Standard I_DD2/I_DD6

None

• Operating temperature range

– Commercial (0˚ to +70˚C)

– Industrial (–40˚C to +85˚C)

– Automotive (–40˚C to +105˚C)

• Design revision

None

• Deep power-down (DPD)

• Status read register (SRR)

• Selectable output drive strength (DS)

• Clock stop capability

1. Contact factory for availability.

Notes:

2. Only available for x16 configuration.

3. Only available for x32 configuration.

• 64ms refresh, 32ms for automotive temperature

Table 1: Key Timing Parameters (CL = 3)

Speed Grade

Clock Rate

200 MHz

185 MHz

166 MHz

133 MHz

Access Time

5.0ns

-5

-54

-6

5.0ns

-75

6.0ns

PDF: 09005aef83dd2b3e

t67m_512mb_mobile_lpddr.pdf - Rev. H 06/13 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

Products and specifications discussed herein are subject to change by Micron without notice.

12 3 4 5 6 7...96

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与MT46H16M32LG相关器件

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MT46H32M16LFBF-5 IT	MICRON	获取价格	LPDRAM
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MT46H32M16LFBF-5:BTR	MICRON	获取价格	存储容量(Mb):512Mb（32M x 16）;内存数据长度(bit):32M ;字编码
MT46H32M16LFBF-5IT:B	MICRON	获取价格	存储容量(Mb):512Mb（32M x 16）;内存数据长度(bit):32M ;字编码
MT46H32M16LFBF-5IT:BTR	MICRON	获取价格	存储容量(Mb):512Mb（32M x 16）;内存数据长度(bit):32M ;字编码
MT46H32M16LFBF-5IT:CTR	MICRON	获取价格	存储容量(Mb):512Mb（32M x 16）;内存数据长度(bit):32M ;字编码
MT46H32M16LFBF-6:BTR	MICRON	获取价格	存储容量(Mb):512Mb（32M x 16）;内存数据长度(bit):32M ;字编码

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