Datasheet > MT46H64M32LFBQ-48 IT

MT46H64M32LFBQ-48 IT

更新时间： 2024-09-17 15:17:35

品牌	Logo	应用领域
镁光 - MICRON		/
页数	文件大小	规格书
98页	5855K
描述
MT46H128M16LF, MT46H64M32LF

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MT46H64M32LFBQ-48 IT 数据手册

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2Gb: x16, x32 Automotive LPDDR SDRAM

Features

Automotive LPDDR SDRAM

MT46H128M16LF – 32 Meg x 16 x 4 Banks

MT46H64M32LF – 16 Meg x 32 x 4 Banks

Options

Mark

Features

• V_DD/V_DDQ= 1.70–1.95V

• V_DD/V_DDQ

– 1.8V/1.8V

• Configuration

• Bidirectional data strobe per byte of data (DQS)

• Internal, pipelined double data rate (DDR)

architecture; two data accesses per clock cycle

– 128 Meg x 16 (32 Meg x 16 x 4 banks) 128M16

– 64 Meg x 32 (16 Meg x 32 x 4 banks)

• Addressing

64M32

• Differential clock inputs (CK and CK#)

– JEDEC-standard

• Commands entered on each positive CK edge

• Plastic "green" package

– 60-ball VFBGA (8mm x 9mm)

– 90-ball VFBGA (8mm x 13mm)

• Timing – cycle time

• DQS edge-aligned with data for READs; center-

aligned with data for WRITEs

• 4 internal banks for concurrent operation

• Data masks (DM) for masking write data; one mask

per byte

– 4.8ns @ CL = 3 (208 MHz)

• Special Options

-48

• Programmable burst lengths (BL): 2, 4, 8, or 16

• Concurrent auto precharge option is supported

• Auto refresh and self refresh modes

• 1.8V LVCMOS-compatible inputs

• Temperature-compensated self refresh (TCSR)²

• Partial-array self refresh (PASR)

– Automotive (package-level burn-in)

• Operating temperature range

– From –40˚C to +85˚C

– From –40˚C to +105˚C¹

• Design revision

1. Contact factory for availability.

Notes:

• Deep power-down (DPD)

2. Self refresh supported up to 85 ºC.

• Status read register (SRR)

• Selectable output drive strength (DS)

• Clock stop capability

• 64ms refresh; 32ms for the automotive temperature

range

Table 1: Key Timing Parameters (CL = 3)

Speed Grade

Clock Rate

Access Time

-48

208 MHz

4.8ns

Table 2: Configuration Addressing – 2Gb

Architecture

128 Meg x 16

64 Meg x 32

16 Meg x 32 x 4 banks

Configuration

Refresh count

32 Meg x 16 x 4 banks

Row addressing

Column addressing

16K A[13:0]

2K A11, A[9:0]

16K A[13:0]

1K A[9:0]

09005aef8541eee0

t89m_auto_lpddr.pdf - Rev. I 05/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

Products and specifications discussed herein are subject to change by Micron without notice.

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