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MM74HC74AMTC PDF预览

MM74HC74AMTC

更新时间: 2024-11-17 11:12:39
品牌 Logo 应用领域
安森美 - ONSEMI PC光电二极管逻辑集成电路触发器
页数 文件大小 规格书
8页 297K
描述
双路 D 型触发器,带预置和清除

MM74HC74AMTC 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active包装说明:TSSOP, TSSOP14,.25
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:1.09Samacsys Confidence:3
Samacsys Status:ReleasedSamacsys PartID:167707
Samacsys Pin Count:14Samacsys Part Category:Integrated Circuit
Samacsys Package Category:Small Outline PackagesSamacsys Footprint Name:MO-153 (TSSOP)
Samacsys Released Date:2015-04-13 16:44:10Is Samacsys:N
系列:HC/UHJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:24000000 Hz最大I(ol):0.004 A
湿度敏感等级:1位数:1
功能数量:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/6 V
传播延迟(tpd):140 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:FF/Latches
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):4.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:4.4 mm最小 fmax:28 MHz
Base Number Matches:1

MM74HC74AMTC 数据手册

 浏览型号MM74HC74AMTC的Datasheet PDF文件第2页浏览型号MM74HC74AMTC的Datasheet PDF文件第3页浏览型号MM74HC74AMTC的Datasheet PDF文件第4页浏览型号MM74HC74AMTC的Datasheet PDF文件第5页浏览型号MM74HC74AMTC的Datasheet PDF文件第6页浏览型号MM74HC74AMTC的Datasheet PDF文件第7页 
DATA SHEET  
www.onsemi.com  
14  
Dual D-Type Flip-Flop  
with Preset and Clear  
1
SOIC14  
CASE 751EF  
MM74HC74A  
The MM74HC74A utilizes advanced silicongate CMOS  
technology to achieve operating speeds similar to the equivalent  
LSTTL part. It possesses the high noise immunity and low power  
consumption of standard CMOS integrated circuits, along with the  
ability to drive 10 LSTTL loads.  
14  
1
TSSOP14 WB  
CASE 948G  
This flipflop has independent data, preset, clear, and clock inputs  
and Q and Q outputs. The logic level present at the data input is  
transferred to the output during the positivegoing transition of the  
clock pulse. Preset and clear are independent of the clock and  
accomplished by a low level at the appropriate input.  
MARKING DIAGRAM  
14  
HC74A  
AWLYWW  
The 74HC logic family is functionally and pinout compatible with  
the standard 74LS logic family. All inputs are protected from damage  
due to static discharge by internal diode clamps to V and ground.  
CC  
1
SOIC14 NB  
Features  
Typical Propagation Delay: 12 ns  
14  
Wide Power Supply Range: 2 V – 6 V  
Low Quiescent Current: 80 mA maximum (74HC Series)  
Low Input Current: 1 mA Maximum  
Fanout of 10 LSTTL Loads  
HC  
74A  
ALYW  
1
TSSOP14 WB  
These Devices are PbFree, Halide Free and are RoHS Compliant  
HC74A = Specific Device Code  
A
= Assembly Location  
WL, L = Wafer Lot  
= Year  
WW, W = Work Week  
Connection Diagram  
Y
TRUTH TABLE  
Inputs  
Outputs  
PR  
L
CLR  
CLK  
X
D
X
X
X
Q
Q
L
H
L
L
H
L
H
X
H
L
X
H
H
(Note1) (Note1)  
H
H
H
H
H
H
L
H
L
H
L
L
H
X
Q0  
Q0  
Q0 = the level of Q before the indicated input  
conditions were established.  
1. This configuration is nonstable; that is, it will  
not persist when preset and clear inputs return  
to their inactive (HIGH) level.  
Figure 1. Pin Assignments for SOIC and TSSOP  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 5 of  
this data sheet.  
© Semiconductor Components Industries, LLC, 1983  
1
Publication Order Number:  
November, 2022 Rev. 2  
MM74HC74A/D  
 

MM74HC74AMTC 替代型号

型号 品牌 替代类型 描述 数据表
MM74HC74AMTCX ONSEMI

完全替代

双路 D 型触发器,带预置和清除
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Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
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Dual D-Type Flip-Flop with Preset and Clear

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