MM74HC74AN

更新时间： 2024-01-27 05:13:55

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		触发器锁存器逻辑集成电路光电二极管
页数	文件大小	规格书
8页	93K
描述
Dual D-Type Flip-Flop with Preset and Clear

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技术参数
数据手册
替代型号

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MM74HC74AN 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
包装说明：	DIP, DIP14,.3	Reach Compliance Code：	unknown
风险等级：	5.92	JESD-30 代码：	R-PDIP-T14
JESD-609代码：	e0	逻辑集成电路类型：	D FLIP-FLOP
功能数量：	2	端子数量：	14
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	DIP
封装等效代码：	DIP14,.3	封装形状：	RECTANGULAR
封装形式：	IN-LINE	电源：	2/6 V
认证状态：	Not Qualified	子类别：	FF/Latches
表面贴装：	NO	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	触发器类型：	POSITIVE EDGE
Base Number Matches：	1

MM74HC74AN 数据手册

September 1983

Revised January 2005

MM74HC74A

Dual D-Type Flip-Flop with Preset and Clear

The 74HC logic family is functionally and pinout compatible

with the standard 74LS logic family. All inputs are protected

from damage due to static discharge by internal diode

clamps to V_CCand ground.

General Description

The MM74HC74A utilizes advanced silicon-gate CMOS

technology to achieve operating speeds similar to the

equivalent LS-TTL part. It possesses the high noise immu-

nity and low power consumption of standard CMOS inte-

grated circuits, along with the ability to drive 10 LS-TTL

loads.

Features

■ Typical propagation delay: 20 ns

This flip-flop has independent data, preset, clear, and clock

inputs and Q and Q outputs. The logic level present at the

data input is transferred to the output during the positive-

going transition of the clock pulse. Preset and clear are

independent of the clock and accomplished by a low level

at the appropriate input.

■ Wide power supply range: 2–6V

■ Low quiescent current: 40 µA maximum (74HC Series)

■ Low input current: 1 µA maximum

■ Fanout of 10 LS-TTL loads

Ordering Code:

Package

Order Number

Package Description

Number

MM74HC74AM

M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MM74HC74AMX_NL

MM74HC74ASJ

MM74HC74AMTC

MM74HC74AMTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

MM74HC74AN

N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Pb-Free package per JEDEC J-STD-020B.

Connection Diagram

Truth Table

Pin Assignments for DIP, SOIC, SOP and TSSOP

Inputs

Outputs

CLR

CLK

H (Note 1)

↑

Q 0

Note: Q0 = the level of Q before the indicated input conditions were estab-

lished.

Note 1: This configuration is nonstable; that is, it will not persist when pre-

set and clear inputs return to their inactive (HIGH) level.

DS005106

www.fairchildsemi.com

12 3 4 5 6 7 8

中文翻译

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MM74HC74AN 替代型号

型号	品牌	替代类型	描述	数据表
MC74HC74ANG	ONSEMI	功能相似	Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
SN74HC74N	TI	功能相似	DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
CD74HC74E	TI	功能相似	Dual D Flip-Flop with Set and Reset Positive-Edge Trigger

与MM74HC74AN相关器件

型号	品牌	获取价格	描述	数据表
MM74HC74AN/A+	ETC	获取价格	Dual D-Type Flip-Flop
MM74HC74AN_NL	FAIRCHILD	获取价格	D Flip-Flop, HC/UH Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, C
MM74HC74ANX	FAIRCHILD	获取价格	Dual D-Type Flip-Flop with Preset and Clear
MM74HC74ASJ	FAIRCHILD	获取价格	Dual D-Type Flip-Flop with Preset and Clear
MM74HC74ASJX	FAIRCHILD	获取价格	Dual D-Type Flip-Flop with Preset and Clear
MM74HC74J	TI	获取价格	HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14, DIP-
MM74HC74J	NSC	获取价格	Dual D Flip-Flop with Preset and Clear
MM74HC74J/A+	ETC	获取价格	Dual D-Type Flip-Flop
MM74HC74N	NSC	获取价格	Dual D Flip-Flop with Preset and Clear
MM74HC74N	TI	获取价格	HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14, DIP-

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