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MH16S64ZJJ-7 PDF预览

MH16S64ZJJ-7

更新时间: 2024-11-19 04:37:59
品牌 Logo 应用领域
三菱 - MITSUBISHI 动态存储器
页数 文件大小 规格书
55页 539K
描述
Synchronous DRAM Module, 16MX64, 6ns, CMOS, DIP-72

MH16S64ZJJ-7 数据手册

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Preliminary Spec.  
MITSUBISHI LSIs  
Some contents are subject to change without notice.  
MH16S64ZJJ -7,-8A,-8,-10,-10L  
1073741824-BIT (16777216 - WORD BY 64-BIT)SynchronousDRAM  
DESCRIPTION  
Utilizes industry standard 16M x 8 Synchronous DRAMs  
The MH16S64ZJJ is 16777216 - word by 64-bit  
Synchronous DRAM module. This consists of eight  
industry standard 16Mx8 Synchronous DRAMs in  
TSOP and one industory standard EEPROM in  
TSSOP.  
TSOP and industry standard EEPROM in TSSOP  
144-pin (72-pin dual in-line package)  
single 3.3V±0.3V power supply  
The mounting of TSOP on a card edge Dual Inline  
package provides any application where high  
densities and large quantities of memory are  
required.  
This is a socket type - memory modules, suitable for  
easy interchange or addition of modules.  
Clock frequency 125MHz(-8A),  
100MHz(-7,-8,-10(L))(max.)  
Fully synchronous operation referenced to clock rising  
edge  
4 bank operation controlled by BA0,1(Bank Address)  
/CAS latency- 2/3(programmable)  
Burst length- 1/2/4/8/Full Page(programmable)  
Burst type- sequential / interleave(programmable)  
Column access - random  
FEATURES  
CLK Access Time  
Frequency  
(Component SDRAM)  
-7  
-8A  
-8  
6.0ns(CL=3)  
6.0ns(CL=3)  
100MHz  
125MHz  
100MHz  
100MHz  
6.0ns(CL=3)  
8.0ns(CL=3)  
Auto precharge / All bank precharge controlled by A10  
Auto refresh and Self refresh  
-10/10L  
4096 refresh cycle /64ms  
LVTTL Interface  
APPLICATION  
main memory or graphic memory in computer systems  
PCB Outline  
(Front)  
(Back)  
1
2
143  
144  
MITSUBISHI  
ELECTRIC  
MIT-DS-0272-0.0I  
12. Oct.1998  
( 1 / 55 )  

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