5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 计数器> MC14522BDW
MC14522BDW PDF预览

MC14522BDW

更新时间： 2024-11-03 22:58:11
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 计数器
页数 文件大小 规格书
10页 276K
描述
Presettable 4-Bit Down Counters

阅读下载

中文翻译

获取价格

MC14522BDW 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOP, SOP16,.4
针数：16Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.63
其他特性：TCO OUTPUT; GATED CLOCK计数方向：DOWN
系列：4000/14000/40000JESD-30 代码：R-PDSO-G16
JESD-609代码：e0长度：10.3 mm
负载电容（CL）：50 pF负载/预设输入：YES
逻辑集成电路类型：DECADE COUNTER最大频率@ Nom-Sup：1500000 Hz
最大I（ol）：0.00064 A工作模式：SYNCHRONOUS
位数：4功能数量：1
端子数量：16最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP16,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5/15 V
传播延迟（tpd）：1100 ns认证状态：Not Qualified
座面最大高度：2.65 mm子类别：Counters
最大供电电压 (Vsup)：18 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED触发器类型：POSITIVE EDGE
宽度：7.5 mm最小 fmax：1.5 MHz
Base Number Matches：1

MC14522BDW 数据手册

 浏览型号MC14522BDW的Datasheet PDF文件第2页浏览型号MC14522BDW的Datasheet PDF文件第3页浏览型号MC14522BDW的Datasheet PDF文件第4页浏览型号MC14522BDW的Datasheet PDF文件第5页浏览型号MC14522BDW的Datasheet PDF文件第6页浏览型号MC14522BDW的Datasheet PDF文件第7页 
SEMICONDUCTOR TECHNICAL DATA  
The MC14522B BCD counter and the MC14526B binary counter are  
constructed with MOS P–channel and N–channel enhancement mode  
devices in a monolithic structure.  
L SUFFIX  
CERAMIC  
CASE 620  
These devices are presettable, cascadable, synchronous down counters  
with a decoded “0” state output for divide–by–N applications. In single stage  
applications the “0” output is applied to the Preset Enable input. The  
Cascade Feedback input allows cascade divide–by–N operation with no  
additional gates required. The Inhibit input allows disabling of the pulse  
counting function. Inhibit may also be used as a negative edge clock.  
These complementary MOS counters can be used in frequency synthesiz-  
ers, phase–locked loops, and other frequency division applications requiring  
low power dissipation and/or high noise immunity.  
P SUFFIX  
PLASTIC  
CASE 648  
•
•
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Logic Edge–Clocked Design — Incremented on Positive Transition of  
Clock or Negative Transition of Inhibit  
Asynchronous Preset Enable  
Capable of Driving Two Low–power TTL Loads or One Low–power  
Schottky TTL Load Over the Rated Temperature Range  
DW SUFFIX  
SOIC  
CASE 751G  
•
•
ORDERING INFORMATION  
MC14XXXBCP  
MC14XXXBCL  
MC14XXXBDW  
Plastic  
Ceramic  
SOIC  
MAXIMUM RATINGS* (Voltages Referenced to V  
)
SS  
Symbol  
Parameter  
DC Supply Voltage  
Value  
Unit  
V
T
A
= – 55° to 125°C for all packages.  
V
DD  
– 0.5 to + 18.0  
V , V  
Input or Output Voltage (DC or Transient)  
– 0.5 to V  
DD  
+ 0.5  
V
in out  
I , I  
Input or Output Current (DC or Transient),  
per Pin  
± 10  
mA  
in out  
PIN ASSIGNMENT  
Q3  
P3  
PE  
1
2
16  
15  
V
DD  
P
Power Dissipation, per Package†  
Storage Temperature  
500  
mW  
C
D
Q2  
T
stg  
– 65 to + 150  
260  
3
4
5
6
7
8
14  
13  
12  
11  
10  
9
P2  
T
Lead Temperature (8–Second Soldering)  
C
L
INHIBIT  
P0  
CF  
* Maximum Ratings are those values beyond which damage to the device may occur.  
†Temperature Derating:  
“0”  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C  
CLOCK  
Q0  
P1  
RESET  
Q1  
FUNCTION TABLE  
Inputs  
Output  
V
SS  
Resulting  
Function  
Preset Cascade  
Enable Feedback  
Clock Reset Inhibit  
“0”  
X
X
X
H
H
H
X
X
X
L
H
X
L
L
H
L
H
H
Asynchronous reset*  
Asynchronous reset  
Asynchronous reset  
This device contains protection circuitry to  
guard against damage due to high static  
voltages or electric fields. However, pre-  
cautions must be taken to avoid applications of  
any voltage higher than maximum rated volt-  
ages to this high–impedance circuit. For proper  
X
L
X
H
H
X
L
Asynchronous preset  
L
L
L
L
X
X
L
L
Decrement inhibited  
Decrement inhibited  
L
operation, V and V  
should be constrained  
in  
out  
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
No change** (inactive edge)  
No change** (inactive edge)  
Decrement**  
to the range V  
(V or V  
in out  
)
V
DD  
.
SS  
H
H
Unused inputs must always be tied to an  
appropriatelogic voltage level (e.g., either V  
SS  
Decrement**  
or V ). Unused outputs must be left open.  
DD  
X = Don’t Care  
NOTES:  
*Output “0” is low when reset goes high only it PE and CF are low.  
**Output “0” is high when reset is low, only if CF is high and count is 0000.  
REV 3  
1/94  
Motorola, Inc. 1995  
1234567...10

中文翻译

下载PDF

与MC14522BDW相关器件

型号 品牌 获取价格 描述 数据表
MC14526B ONSEMI

获取价格

 		Presettable 4-Bit Down Counters
MC14526B MOTOROLA

获取价格

 		Presettable 4-Bit Down Counters
MC14526B_06 ONSEMI

获取价格

 		Presettable 4−Bit Down Counters
MC14526BAL MOTOROLA

获取价格

 		Binary Counter, 4000/14000/40000 Series, Synchronous, Positive Edge Triggered, 4-Bit, Down
MC14526BALD MOTOROLA

获取价格

 		暂无描述
MC14526BALDS MOTOROLA

获取价格

 		4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT DOWN BINARY COUNTER, CDIP16, 62
MC14526BALS MOTOROLA

获取价格

 		IC,COUNTER,DOWN,4-BIT BINARY,CMOS,DIP,16PIN,CERAMIC
MC14526BCL MOTOROLA

获取价格

 		Presettable 4-Bit Down Counters
MC14526BCLD MOTOROLA

获取价格

 		Binary Counter, 4000/14000/40000 Series, Synchronous, Positive Edge Triggered, 4-Bit, Down
MC14526BCLDS MOTOROLA

获取价格

 		4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT DOWN BINARY COUNTER, CDIP16, 62

与MC14522BDW相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证