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MC14526BFR1 PDF预览

MC14526BFR1

更新时间: 2024-11-04 14:43:27
品牌 Logo 应用领域
安森美 - ONSEMI 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
12页 207K
描述
4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT DOWN BINARY COUNTER, PDSO16, EIAJ, SOP-16

MC14526BFR1 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:SOIC包装说明:EIAJ, SOP-16
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.35
Is Samacsys:N计数方向:DOWN
系列:4000/14000/40000JESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:10.2 mm
负载电容(CL):50 pF负载/预设输入:YES
逻辑集成电路类型:BINARY COUNTER最大频率@ Nom-Sup:1500000 Hz
最大I(ol):0.00064 A工作模式:SYNCHRONOUS
位数:4功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5/15 V传播延迟(tpd):1100 ns
认证状态:Not Qualified座面最大高度:2.05 mm
子类别:Counters最大供电电压 (Vsup):18 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:5.275 mm
最小 fmax:4 MHzBase Number Matches:1

MC14526BFR1 数据手册

 浏览型号MC14526BFR1的Datasheet PDF文件第2页浏览型号MC14526BFR1的Datasheet PDF文件第3页浏览型号MC14526BFR1的Datasheet PDF文件第4页浏览型号MC14526BFR1的Datasheet PDF文件第5页浏览型号MC14526BFR1的Datasheet PDF文件第6页浏览型号MC14526BFR1的Datasheet PDF文件第7页 
The MC14526B binary counter is constructed with MOS P–channel  
and N–channel enhancement mode devices in a monolithic structure.  
This device is presettable, cascadable, synchronous down counter  
with a decoded “0” state output for divide–by–N applications. In  
single stage applications the “0” output is applied to the Preset Enable  
input. The Cascade Feedback input allows cascade divide–by–N  
operation with no additional gates required. The Inhibit input allows  
disabling of the pulse counting function. Inhibit may also be used as a  
negative edge clock.  
This complementary MOS counter can be used in frequency  
synthesizers, phase–locked loops, and other frequency division  
applications requiring low power dissipation and/or high noise  
immunity.  
http://onsemi.com  
MARKING  
DIAGRAMS  
16  
PDIP–16  
P SUFFIX  
CASE 648  
MC14526BCP  
AWLYYWW  
1
16  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Logic Edge–Clocked Design — Incremented on Positive Transition  
of Clock or Negative Transition of Inhibit  
14526B  
SOIC–16  
DW SUFFIX  
CASE 751G  
AWLYYWW  
Asynchronous Preset Enable  
Capable of Driving Two Low–power TTL Loads or One Low–power  
1
Schottky TTL Load Over the Rated Temperature Range  
16  
SOEIAJ–16  
F SUFFIX  
CASE 966  
MC14526B  
AWLYWW  
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)  
SS  
1
Symbol  
Parameter  
Value  
Unit  
V
A
= Assembly Location  
V
DD  
DC Supply Voltage Range  
0.5 to +18.0  
WL or L = Wafer Lot  
YY or Y = Year  
WW or W = Work Week  
V , V  
in out  
Input or Output Voltage Range  
(DC or Transient)  
0.5 to V + 0.5  
V
DD  
I , I  
in out  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
ORDERING INFORMATION  
P
D
Power Dissipation,  
500  
mW  
per Package (Note 3.)  
Device  
Package  
PDIP–16  
SOIC–16  
Shipping  
T
A
Operating Temperature Range  
Storage Temperature Range  
55 to +125  
65 to +150  
260  
°C  
°C  
°C  
MC14526BCP  
MC14526BDW  
2000/Box  
47/Rail  
T
stg  
T
L
Lead Temperature  
(8–Second Soldering)  
MC14526BDWR2  
MC14526BF  
SOIC–16 1000/Tape & Reel  
SOEIAJ–16 See Note 1.  
2. Maximum Ratings are those values beyond which damage to the device  
may occur.  
3. Temperature Derating:  
1. For ordering information on the EIAJ version of  
the SOIC packages, please contact your local  
ON Semiconductor representative.  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
high–impedancecircuit. For proper operation, V and V should be constrained  
in  
out  
to the range V  
(V or V  
)
V
DD  
.
SS  
in  
out  
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,  
either V or V ). Unused outputs must be left open.  
SS  
DD  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 3  
MC14526B/D  

MC14526BFR1 替代型号

型号 品牌 替代类型 描述 数据表
933406850653 NXP

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IC 4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT DOWN BINARY COUNTER, PDSO16,

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