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MC10EP446 PDF预览

MC10EP446

更新时间: 2024-09-26 22:58:07
品牌 Logo 应用领域
安森美 - ONSEMI 转换器
页数 文件大小 规格书
20页 176K
描述
3.3V/5V 8々Bit CMOS/ECL/TTL Data Input Parallel/Serial Converter

MC10EP446 数据手册

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MC10EP446, MC100EP446  
3.3V/5V 8-Bit  
CMOS/ECL/TTL Data Input  
Parallel/Serial Converter  
The MC10/100EP446 is an integrated 8−bit parallel to serial data  
converter. The device is designed with unique circuit topology to  
operate for NRZ data rates up to 3.2 Gb/s. The conversion sequence  
from parallel data into a serial data stream is from bit D0 to D7. The  
parallel input pins D0−D7 are configurable to be threshold controlled by  
CMOS, ECL, or TTL level signals. The serial data rate output can be  
selected at internal clock data rate or twice the internal clock data rate  
using the CKSEL pin.  
http://onsemi.com  
MARKING DIAGRAM*  
Control pins are provided to reset (SYNC) and disable internal clock  
circuitry (CKEN). In either CKSEL modes, the internal flip−flops are  
triggered on the rising edge for CLK and the multiplexers are switched  
on the falling edge of CLK, therefore, all associated specification  
limits are referenced to the negative edge of the clock input.  
MCXXX  
EP446  
AWLYYWW  
LQFP−32  
FA SUFFIX  
CASE 873A  
32  
Additionally, V pin is provided for single−ended input condition.  
BB  
1
The 100 Series devices contain temperature compensation network.  
XXX  
A
WL  
YY  
= 10 or 100  
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
3.2 Gb/s Typical Data Rate Capability  
Differential Clock and Serial Outputs  
V Output for Single-ended Input Applications  
BB  
WW  
Asynchronous Data Reset (SYNC)  
PECL Mode Operating Range:  
*For additional marking information, refer to  
Application Note AND8002/D.  
V
= 3.0 V to 5.5 V with V = 0 V  
CC  
EE  
NECL Mode Operating Range:  
= 0 V with V = −3.0 V to −5.5 V  
V
CC  
EE  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
Open Input Default State  
dimensions section on page 17 of this data sheet.  
Safety Clamp on Inputs  
Parallel Interface Can Support PECL, TTL or CMOS  
Semiconductor Components Industries, LLC, 2004  
1
Publication Order Number:  
June, 2004 − Rev. 5  
MC10EP446/D  

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