MC10EP451FA

更新时间： 2024-01-19 03:53:22

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
10页	94K
描述
3.3V / 5VECL 6-Bit Differential Register with Master Reset

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数据手册

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MC10EP451FA 数据手册

MC10EP451, MC100EP451

3.3V / 5VꢀECL 6−Bit

Differential Register with

Master Reset

The MC10/100EP451 is a 6−bit fully differential register with

common clock and single−ended Master Reset (MR). It is ideal for

very high frequency applications where a registered data path is

necessary.

http://onsemi.com

MARKING

DIAGRAM*

All inputs have a 75 kW pulldown resistor internally. Differential

inputs have an override clamp. Unused differential register inputs can

be left open and will default LOW. When the differential inputs are

forced to < V + 1.2 V, the clamp will override and force the output to

a default state. When in the default state, and since the flip−flop is edge

triggered, the output reaches a determined, but not predicted, valid

state.

The positive transition of CLK (pin 4) will latch the registers.

Master Reset (MR) HIGH will asynchronously reset all registers

forcing Q outputs to go LOW.

MCxxx

EP451

AWLYYWW

LQFP−32

FA SUFFIX

CASE 873A

The 100 Series contains temperature compensation.

xxx = 10 or 100

= Assembly Location

WL = Wafer Lot

YY = Year

• 450 ps Typical Propagation Delay

• Maximum Frequency > 3.0 GHz Typical

• Asynchronous Master Reset

WW = Work Week

• 20 ps Skew Within Device, 35 ps Skew Device−To−Device

*For additional marking information, refer to

Application Note AND8002/D.

• PECL Mode Operating Range: V = 3.0 V to 5.5 V

With V = 0 V

• NECL Mode Operating Range: V = 0 V

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 7 of this data sheet.

With V = −3.0 V to −5.5 V

• Open Input Default State

• Safety Clamp on Inputs

• Pb−Free Packages are Available*

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

Semiconductor Components Industries, LLC, 2004

Publication Order Number:

June, 2004 − Rev. 6

MC10EP451/D

12 3 4 5 6 7...10

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与MC10EP451FA相关器件

型号	品牌	获取价格	描述	数据表
MC10EP451FAG	ONSEMI	获取价格	3.3V / 5VECL 6-Bit Differential Register with Master Reset
MC10EP451FAG	ROCHESTER	获取价格	10E SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQFP32, LEAD FREE,
MC10EP451FAR2	ONSEMI	获取价格	3.3V / 5VECL 6-Bit Differential Register with Master Reset
MC10EP451FAR2	ROCHESTER	获取价格	10E SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQFP32, LQFP-32
MC10EP451FAR2G	ONSEMI	获取价格	3.3V / 5V ECL 6−Bit Differential Register with Master Reset
MC10EP451FAR2G	ROCHESTER	获取价格	10E SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQFP32, LEAD FREE,
MC10EP451MNG	ROCHESTER	获取价格	10E SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC32, 5 X 5 MM, 1
MC10EP451MNG	ONSEMI	获取价格	3.3V / 5V ECL 6−Bit Differential Register with Master Reset
MC10EP451MNR4G	ONSEMI	获取价格	3.3V / 5V ECL 6−Bit Differential Register with Master Reset
MC10EP451MNR4G	ROCHESTER	获取价格	10E SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC32, 5 X 5 MM, 1

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