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MC10EP52DR2G

更新时间： 2024-11-02 05:10:23
品牌 Logo 应用领域
安森美 - ONSEMI 触发器时钟
页数 文件大小 规格书
12页 163K
描述
3.3V / 5V ECL Differential Data and Clock D Flip−Flop

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MC10EP52DR2G 数据手册

 浏览型号MC10EP52DR2G的Datasheet PDF文件第2页浏览型号MC10EP52DR2G的Datasheet PDF文件第3页浏览型号MC10EP52DR2G的Datasheet PDF文件第4页浏览型号MC10EP52DR2G的Datasheet PDF文件第5页浏览型号MC10EP52DR2G的Datasheet PDF文件第6页浏览型号MC10EP52DR2G的Datasheet PDF文件第7页 
MC10EP52, MC100EP52  
3.3V / 5VꢀECL Differential  
Data and Clock D Flip−Flop  
Description  
The MC10EP/100EP52 is a differential data, differential clock D  
flip−flop. The device is pin and functionally equivalent to the EL52  
device.  
http://onsemi.com  
Data enters the master portion of the flip−flop when the clock is  
LOW and is transferred to the slave, and thus the outputs, upon a  
positive transition of the clock. The differential clock inputs of the  
EP52 allow the device to also be used as a negative edge triggered  
device.  
MARKING  
DIAGRAMS*  
8
1
8
8
HEP52  
ALYW  
KEP52  
ALYW  
G
The EP52 employs input clamping circuitry so that under open input  
1
conditions (pulled down to V ) the outputs of the device will remain  
EE  
G
SOIC−8  
D SUFFIX  
CASE 751  
stable.  
1
The 100 Series contains temperature compensation.  
Features  
8
1
8
1
• 330 ps Typical Propagation Delay  
• Maximum Frequency u 4 GHz Typical  
• PECL Mode: V = 3.0 V to 5.5 V with V = 0 V  
8
1
HP52  
KP52  
ALYWG  
ALYWG  
TSSOP−8  
DT SUFFIX  
CASE 948R  
CC  
EE  
G
G
• NECL Mode: V = 0 V with V = −3.0 V to −5.5 V  
CC  
EE  
• Open Input Default State  
• Safety Clamp on Inputs  
• Q Output Will Default LOW with Inputs Open or at V  
• Pb−Free Packages are Available  
EE  
1
4
1
4
DFN8  
MN SUFFIX  
CASE 506AA  
H
K
= MC10  
= MC100  
A
L
= Assembly Location  
= Wafer Lot  
5T = MC10  
3O = MC100  
Y
W
M
G
= Year  
= Work Week  
= Date Code  
= Pb−Free Package  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 8 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 − Rev. 6  
MC10EP52/D  
1234567...12

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MC10EP52DR2G 替代型号

型号 品牌 替代类型 描述 数据表
MC100EP51DTR2G ONSEMI

完全替代

 3.3V / 5V ECL D Flip−Flop with Reset and Differential Clock
MC10EP52DR2 ONSEMI

完全替代

 3.3V / 5V ECL Differential Receiver/Driver with Internal Termination Data and Clock D Flip
MC10EL31DG ONSEMI

类似代替

 5 V ECL D Flip-Flop With Set and Reset

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