Datasheet > MC10EP445_06

MC10EP445_06

更新时间： 2024-11-02 05:10:23

品牌	Logo	应用领域
安森美 - ONSEMI		转换器
页数	文件大小	规格书
18页	152K
描述
3.3V/5V ECL 8−Bit Serial/Parallel Converter

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MC10EP445_06 数据手册

MC10EP445, MC100EP445

3.3V/5VꢀECL 8−Bit

Serial/Parallel Converter

Description

The MC10/100EP445 is an integrated 8–bit differential serial to

parallel data converter with asynchronous data synchronization. The

device has two modes of operation. CKSEL HIGH mode is designed

to operate NRZ data rates of up to 3.3 Gb/s, while CKSEL LOW mode

is designed to operate at twice the internal clock data rate of up to

5.0 Gb/s. The conversion sequence was chosen to convert the first

serial bit to Q0, the second bit to Q1, etc. Two selectable differential

serial inputs, which are selected by SINSEL, provide this device with

loop−back testing capability. The MC10/100EP445 has a SYNC pin

which, when held high for at least two consecutive clock cycles, will

swallow one bit of data shifting the start of the conversion data from

http://onsemi.com

MARKING

DIAGRAM*

MCxxx

EP445

AWLYYWWG

LQFP−32

FA SUFFIX

CASE 873A

D to D . Each additional shift requires an additional pulse to be

n+1

applied to the SYNC pin.

Control pins are provided to reset and disable internal clock

xxx

= 10 or 100

= Assembly Location

circuitry. Additionally, V pin is provided for single−ended input

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

condition.

The 100 Series contains temperature compensation.

Features

• 1530 ps Propagation Delay

*For additional marking information, refer to

Application Note AND8002/D.

• 5.0 Gb/s Typical Data Rate for CLKSEL LOW Mode

• Differential Clock and Serial Inputs

• V Output for Single-Ended Input Applications

• Asynchronous Data Synchronization (SYNC)

• Asynchronous Master Reset (RESET)

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 16 of this data sheet.

• PECL Mode Operating Range: V = 3.0 V to 5.5 V

with V = 0 V

• NECL Mode Operating Range: V = 0 V

with V = −3.0 V to −5.5 V

• Open Input Default State

• CLK ENABLE Immune to Runt Pulse Generation

• Pb−Free Packages are Available*

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

Publication Order Number:

July, 2006 − Rev. 11

MC10EP445/D

12 3 4 5 6 7...18

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