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MC10ELT26 PDF预览

MC10ELT26

更新时间: 2024-11-29 22:58:07
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 转换器
页数 文件大小 规格书
2页 78K
描述
1:2 Fanout Differential PECL to TTL Translator

MC10ELT26 数据手册

 浏览型号MC10ELT26的Datasheet PDF文件第2页 
SEMICONDUCTOR TECHNICAL DATA  
The MC10ELT/100ELT26 is a 1:2 fanout differential PECL to TTL  
translator. Because PECL (Positive ECL) levels are used only +5V and  
ground are required. The small outline 8-lead SOIC package and the 1:2  
fanout design of the ELT23 makes it ideal for applications which require  
the low skew duplication of a signal in a tightly packed PC board.  
Because the mature MOSAIC 1.5 process is used, low cost can be added  
to the list of features.  
The V  
output allows the ELT26 to also be used in a single-ended  
BB  
input mode. In this mode the V  
output is tied to the IN input for a  
BB  
8
non-inverting buffer or the IN input for an inverting buffer. If used the V  
pin should be bypassed to ground via a 0.01µF capacitor.  
BB  
1
The ELT26 is available in both ECL standards: the 10ELT is compatible  
with positive MECL 10H logic levels while the 100ELT is compatible with  
positive ECL 100K logic levels.  
D SUFFIX  
PLASTIC SOIC PACKAGE  
CASE 751-05  
3.5ns Typical Propagation Delay  
<500ps Typical Output to Output Skew  
Differential PECL Inputs  
Small Outline SOIC Package  
24mA TTL Outputs  
Flow Through Pinouts  
LOGIC DIAGRAM AND PINOUT ASSIGNMENT  
PIN DESCRIPTION  
FUNCTION  
NC 1  
8
7
V
CC  
PIN  
Qn  
D
TTL Outputs  
Diff PECL Input  
+5.0V Supply  
Reference Output  
Ground  
D
D
2
3
Q0  
Q1  
V
V
GND  
CC  
BB  
TTL  
6
5
V
4
PECL  
BB  
GND  
This document contains information on a product under development. Motorola reserves the right to  
change or discontinue this product without notice.  
1/95  
REV 2  
Motorola, Inc. 1996  

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