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MC10E416_06 PDF预览

MC10E416_06

更新时间: 2024-11-01 04:59:39
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
9页 133K
描述
5V ECL Quint Differential Line Receiver

MC10E416_06 数据手册

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MC10E416, MC100E416  
5VꢀECL Quint Differential  
Line Receiver  
Description  
The MC10E416/100E416 is a 5-bit differential line receiving device.  
The 2.0 GHz of bandwidth provided by the high frequency outputs  
makes the device ideal for buffering of very high speed oscillators.  
The design incorporates two stages of gain, internal to the device,  
making it an excellent choice for use in high bandwidth amplifier  
applications.  
The differential inputs have internal clamp structures which will  
force the Q output of a gate in an open input condition to go to a LOW  
state. Thus, inputs of unused gates can be left open and will not affect  
the operation of the rest of the device. Note that the input clamp will  
http://onsemi.com  
PLCC28  
FN SUFFIX  
CASE 776  
MARKING DIAGRAM*  
take affect only if both inputs fall 2.5 V below V  
.
CC  
1 28  
The V pin, an internally generated voltage supply, is available to  
BB  
this device only. For single-ended input conditions, the unused  
differential input is connected to V as a switching reference voltage.  
BB  
MCxxxE416FNG  
AWLYYWW  
V
BB  
may also rebias AC coupled inputs. When used, decouple V  
BB  
and V via a 0.01 mF capacitor and limit current sourcing or sinking  
CC  
to 0.5 mA. When not used, V should be left open.  
BB  
The 100 Series contains temperature compensation.  
xxx  
A
WL  
YY  
WW  
G
= 10 or 100  
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= PbFree Package  
Features  
Differential D and Q; V available  
BB  
600 ps Max. Propagation Delay  
High Frequency Outputs  
2 Stages of Gain  
*For additional marking information, refer to  
Application Note AND8002/D.  
PECL Mode Operating Range: V = 4.2 V to 5.7 V  
CC  
with V = 0 V  
EE  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 7 of this data sheet.  
NECL Mode Operating Range: V = 0 V  
CC  
with V = 4.2 V to 5.7 V  
EE  
Internal Input 50 kW Pulldown Resistors  
ESD Protection: Human Body Model; > 2 kV,  
Machine Model; > 200 V  
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test  
Moisture Sensitivity Level:  
Pb = 1;  
PbFree = 3  
For Additional Information, see Application Note AND8003/D  
Flammability Rating: UL 94 V0 @ 0.125 in,  
Oxygen Index: 28 to 34  
Transistor Count = 201 devices  
PbFree Packages are Available*  
*For additional information on our PbFree strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
November, 2006 Rev. 7  
MC10E416/D  

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