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MC100EP08MNR4 PDF预览

MC100EP08MNR4

更新时间: 2024-11-24 21:22:35
品牌 Logo 应用领域
安森美 - ONSEMI 输入元件光电二极管逻辑集成电路石英晶振触发器
页数 文件大小 规格书
11页 153K
描述
100E SERIES, 2-INPUT XOR/XNOR GATE, PDSO8, DFN-8

MC100EP08MNR4 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DFN
包装说明:DFN-8针数:8
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.77其他特性:NECL MODE: 0V VCC WITH VEE = -3.0V TO -5.5V
系列:100EJESD-30 代码:S-PDSO-N8
长度:2 mm逻辑集成电路类型:XOR/XNOR GATE
湿度敏感等级:1功能数量:1
输入次数:2端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:HVSON
封装等效代码:SOLCC8,.08,20封装形状:SQUARE
封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):225电源:-4.5 V
最大电源电流(ICC):40 mAProp。Delay @ Nom-Sup:0.32 ns
传播延迟(tpd):0.3 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:ECL
温度等级:INDUSTRIAL端子形式:NO LEAD
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:2 mm
Base Number Matches:1

MC100EP08MNR4 数据手册

 浏览型号MC100EP08MNR4的Datasheet PDF文件第2页浏览型号MC100EP08MNR4的Datasheet PDF文件第3页浏览型号MC100EP08MNR4的Datasheet PDF文件第4页浏览型号MC100EP08MNR4的Datasheet PDF文件第5页浏览型号MC100EP08MNR4的Datasheet PDF文件第6页浏览型号MC100EP08MNR4的Datasheet PDF文件第7页 
MC10EP08, MC100EP08  
3.3V / 5VꢀECL 2-Input  
Differential XOR/XNOR  
Description  
The MC10/100EP08 is a differential XOR/XNOR gate. The EP08 is  
ideal for applications requiring the fastest AC performance available.  
The 100 Series contains temperature compensation.  
http://onsemi.com  
MARKING DIAGRAMS*  
Features  
250 ps Typical Propagation Delay  
Maximum Frequency > 3 GHz Typical  
8
8
8
HEP08  
ALYWG  
G
KEP08  
ALYWG  
G
1
PECL Mode Operating Range: V = 3.0 V to 5.5 V  
CC  
SOIC8  
D SUFFIX  
CASE 751  
with V = 0 V  
EE  
1
1
NECL Mode Operating Range: V = 0 V  
CC  
with V = 3.0 V to 5.5 V  
EE  
Open Input Default State  
Safety Clamp on Inputs  
8
1
8
1
8
HP08  
ALYWG  
G
KP082  
ALYWG  
G
Q Output Will Default LOW with Inputs Open or at V  
These are PbFree Devices  
EE  
1
TSSOP8  
DT SUFFIX  
CASE 948R  
1
1
5J DG  
2Y DG  
G
G
4
4
DFN8  
MN SUFFIX  
CASE 506AA  
H
K
= MC10  
= MC100  
A
L
= Assembly Location  
= Wafer Lot  
5J = MC10  
2Y = MC100  
Y
W
G
= Year  
= Work Week  
= PbFree Package  
D
= Date Code  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 8 of this data sheet.  
© Semiconductor Components Industries, LLC, 2012  
1
Publication Order Number:  
September, 2012 Rev. 6  
MC10EP08/D  

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