Datasheet > MC100EP1

MC100EP1

更新时间： 2024-11-23 23:01:31

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
8页	85K
描述
3.3V / 5VECL Quad 2-Input Differential AND/NAND

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MC100EP1 数据手册

MC10EP105, MC100EP105

3.3V / 5VĄECL Quad 2-Input

Differential AND/NAND

The MC10/100EP105 is a quad 2–input differential AND/NAND

gate. Each gate is functionally equivalent to the EP05 and LVEL05

devices. With AC performance much faster than the LVEL05 device,

the EP105 is ideal for applications requiring the fastest AC

performance available.

http://onsemi.com

The 100 Series contains temperature compensation.

MARKING

DIAGRAM*

• 275 ps Typical Propagation Delay

• Maximum Frequency > 3 GHz Typical

• PECL Mode Operating Range: V = 3.0 V to 5.5 V

MCxxx

EP105

with V = 0 V

AWLYYWW

• NECL Mode Operating Range: V = 0 V

LQFP–32

FA SUFFIX

CASE 873A

with V = –3.0 V to –5.5 V

• Open Input Default State

• Safety Clamp on Inputs

xxx = 10 or 100

= Assembly Location

WL = Wafer Lot

YY = Year

WW = Work Week

*For additional information, see Application Note

AND8002/D

ORDERING INFORMATION

Device

Package

Shipping

MC10EP105FA

LQFP–32

250 Units/Tray

MC10EP105FAR2 LQFP–32 2000 Tape & Reel

MC100EP105FA LQFP–32 250 Units/Tray

MC100EP105FAR2 LQFP–32 2000 Tape & Reel

Semiconductor Components Industries, LLC, 2002

Publication Order Number:

September, 2002 – Rev. 8

MC10EP105/D

12 3 4 5 6 7 8

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