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MC100EL35DR2G PDF预览

MC100EL35DR2G

更新时间: 2024-02-15 01:16:01
品牌 Logo 应用领域
安森美 - ONSEMI 触发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 145K
描述
5V ECL JK Flip-Flop

MC100EL35DR2G 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP8,.25针数:8
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.11
Is Samacsys:N其他特性:NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V
系列:100ELJESD-30 代码:R-PDSO-G8
JESD-609代码:e3长度:4.9 mm
逻辑集成电路类型:J-K FLIP-FLOP最大频率@ Nom-Sup:1400000000 Hz
位数:2功能数量:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C输出特性:OPEN-EMITTER
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:+-5 V最大电源电流(ICC):37 mA
Prop。Delay @ Nom-Sup:0.745 ns传播延迟(tpd):0.7 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:FF/Latches最大供电电压 (Vsup):5.7 V
最小供电电压 (Vsup):4.2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:ECL
温度等级:INDUSTRIAL端子面层:Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
触发器类型:POSITIVE EDGE宽度:3.9 mm
最小 fmax:1800 MHzBase Number Matches:1

MC100EL35DR2G 数据手册

 浏览型号MC100EL35DR2G的Datasheet PDF文件第2页浏览型号MC100EL35DR2G的Datasheet PDF文件第3页浏览型号MC100EL35DR2G的Datasheet PDF文件第4页浏览型号MC100EL35DR2G的Datasheet PDF文件第5页浏览型号MC100EL35DR2G的Datasheet PDF文件第6页浏览型号MC100EL35DR2G的Datasheet PDF文件第7页 
MC10EL35, MC100EL35  
5VꢀECL JK Flip-Flop  
Description  
The MC10EL/100EL35 is a high speed JK flip-flop. The J/K data  
enters the master portion of the flip-flop when the clock is LOW and is  
transferred to the slave, and thus the outputs, upon a positive transition  
of the clock. The reset pin is asynchronous and is activated with a logic  
HIGH.  
http://onsemi.com  
MARKING  
The 100 Series contains temperature compensation.  
DIAGRAMS*  
Features  
8
8
1
8
525 ps Propagation Delay  
2.2G Hz Toggle Frequency  
ESD Protection: > 1 kV Human Body Model,  
> 100 V Machine Model  
1
HEL35  
KEL35  
ALYW  
G
ALYW  
G
SOIC8  
D SUFFIX  
CASE 751  
1
PECL Mode Operating Range: V = 4.2 V to 5.7 with V = 0 V  
CC  
EE  
NECL Mode Operating Range: V = 0 V with V = 4.2 V to  
CC  
EE  
8
1
8
8
5.7 V  
1
HL35  
ALYWG  
G
KL35  
ALYWG  
G
Internal Input Pulldown Resistors on J, K, CLK, and R  
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test  
Moisture Sensitivity Level 1  
TSSOP8  
DT SUFFIX  
CASE 948R  
1
For Additional Information, see Application Note AND8003/D  
Flammability Rating: UL94 V0 @ 0.125 in,  
Oxygen Index 28 to 34  
Transistor Count = 81 devices  
PbFree Packages are Available  
1
4
1
4
DFN8  
MN SUFFIX  
CASE 506AA  
H
K
= MC10  
= MC100  
L
Y
= Wafer Lot  
= Year  
4W = MC10  
2L = MC100  
W = Work Week  
M = Date Code  
A
= Assembly Location G = PbFree Package  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 Rev. 6  
MC10EL35/D  

MC100EL35DR2G 替代型号

型号 品牌 替代类型 描述 数据表
MC100EL35DR2 ONSEMI

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5V ECL JK Flip-Flop

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