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MC-45V16AD641KF-A10 PDF预览

MC-45V16AD641KF-A10

更新时间: 2024-11-25 22:09:59
品牌 Logo 应用领域
日电电子 - NEC 存储内存集成电路动态存储器
页数 文件大小 规格书
16页 161K
描述
16M-WORD BY 64-BIT VirtualChannel SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE

MC-45V16AD641KF-A10 技术参数

生命周期:Obsolete零件包装代码:DIMM
包装说明:,针数:168
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.32风险等级:5.84
Is Samacsys:N访问模式:DUAL BANK PAGE BURST
最长访问时间:6 nsJESD-30 代码:R-XDMA-N168
内存密度:1073741824 bit内存集成电路类型:SYNCHRONOUS DRAM MODULE
内存宽度:64功能数量:1
端口数量:1端子数量:168
字数:16777216 words字数代码:16000000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:16MX64
封装主体材料:UNSPECIFIED封装形状:RECTANGULAR
封装形式:MICROELECTRONIC ASSEMBLY认证状态:Not Qualified
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:NO
技术:MOS温度等级:COMMERCIAL
端子形式:NO LEAD端子位置:DUAL
Base Number Matches:1

MC-45V16AD641KF-A10 数据手册

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DATA SHEET  
MOS INTEGRATED CIRCUIT  
MC-45V16AD641  
16M-WORD BY 64-BIT  
VirtualChannelTM SYNCHRONOUS DYNAMIC RAM MODULE  
UNBUFFERED TYPE  
Description  
The MC-45V16AD641 is a 16,777,216 words by 64 bits VirtualChannel synchronous dynamic RAM module on  
which 16 pieces of 64M VirtualChannel SDRAM : µPD4565821 are assembled.  
This module provides high density and large quantities of memory in a small space without utilizing the surface-  
mounting technology on the printed circuit board.  
Decoupling capacitors are mounted on power supply line for noise reduction.  
Features  
16,777,216 words by 64 bits organization  
Clock frequency and access time from CLK  
Part number  
Clock  
Access  
time  
Maximum supply current mA  
Operating  
Read  
latency frequency  
Refresh  
MHz  
from CLK Prefetch Restore  
ns (MAX.)  
Channel  
Auto  
Self  
16  
(MAX.)  
read / write (Burst)  
MC-45V16AD641KF-A75  
MC-45V16AD641KF-A10  
MC-45V16AD641EF-A75  
MC-45V16AD641EF-A10  
2
133  
100  
133  
100  
5.4  
6
880  
840  
880  
840  
720  
600  
720  
600  
1280  
1120  
1280  
1120  
5.4  
6
Fully Standard Synchronous Dynamic RAM, with all signals referenced to a positive clock edge  
Dual internal banks controlled by BA0 (Bank Select)  
Programmable Wrap sequence (Sequential / Interleave)  
Programmable burst length (1, 2, 4, 8 and 16)  
Read latency (2)  
Prefetch Read latency (4)  
Auto precharge and without auto precharge  
Auto refresh and Self refresh  
Single 3.3 V ± 0.3 V power supply  
Interface: LVTTL  
Refresh cycle: 4K cycles / 64 ms  
168-pin dual in-line memory module (Pin pitch = 1.27 mm)  
Unbuffered type  
Serial PD  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for  
availability and additional information.  
Document No. M13823EJ6V0DS00 (6th edition)  
Date Published June 2000 NS CP (K)  
Printed in Japan  
The mark shows major revised points.  
1998  
©

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