Datasheet > M54HC132F1R

M54HC132F1R

更新时间： 2024-11-03 22:46:39

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		输入元件
页数	文件大小	规格书
9页	237K
描述
QUAD 2-INPUT SCHMITT NAND GATE

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中文翻译

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数据手册

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M54HC132F1R 数据手册

M54HC132

M74HC132

QUAD 2-INPUT SCHMITT NAND GATE

HIGH SPEED

t_PD= 11 ns (TYP.) AT V_CC= 5 V

LOW POWER DISSIPATION

I_CC= 1µA (MAX.) AT T_A= 25 °C

OUTPUT DRIVE CAPABILITY

10 LSTTL LOADS

HIGH NOISE IMMUNITY

B1R

(Plastic Package)

F1R

V_H(TYP.) = 0.9 V AT V_CC= 5 V

SYMMETRICAL OUTPUT IMPEDANCE

I_OH= I_OL= 4 mA (MIN.)

BALANCED PROPAGATION DELAYS

t_PLH= t_PHL

WIDE OPERATING VOLTAGE RANGE

V_CC(OPR) = 2 V TO 6 V

(Ceramic Package)

M1R

(Micro Package)

C1R

(Chip Carrier)

PIN AND FUNCTION COMPATIBLE

WITH 54/74LS132

ORDER CODES :

M54HC132F1R

M74HC132B1R

M74HC132M1R

M74HC132C1R

DESCRIPTION

The M54/74HC132 isa high speed CMOSQUAD2-

INPUT SCHMITT NAND GATE fabricated in silicon

gate C²MOS technology. It has the same high

speed performance of LSTTL combined with true

CMOS low power consumption. Pin configuration

and function are identical to those of the

M54/74HC00.

PIN CONNECTIONS (top view)

The hysterisis characteristics (around 20 % V_CC) of

all inputs allow slowly changing input signals to be

transformed into sharply defined jitter-free output

signals. All inputs are equipped with protection cir-

cuits against static discharge and transient excess

voltage.

INPUT AND OUTPUT EQUIVALENT CIRCUIT

NC =

No Internal

Connection

December 1992

1/9

12 3 4 5 6 7...9

中文翻译

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