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M54HC133F1R PDF预览

M54HC133F1R

更新时间: 2024-11-03 22:46:39
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 输入元件
页数 文件大小 规格书
10页 239K
描述
13 INPUT NAND GATE

M54HC133F1R 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:CERAMIC, DIP-16针数:16
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.58系列:HC/UH
JESD-30 代码:R-GDIP-T16JESD-609代码:e0
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.004 A功能数量:1
输入次数:13端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:2/6 VProp。Delay @ Nom-Sup:39 ns
传播延迟(tpd):39 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:5.08 mm
子类别:Gates最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

M54HC133F1R 数据手册

 浏览型号M54HC133F1R的Datasheet PDF文件第2页浏览型号M54HC133F1R的Datasheet PDF文件第3页浏览型号M54HC133F1R的Datasheet PDF文件第4页浏览型号M54HC133F1R的Datasheet PDF文件第5页浏览型号M54HC133F1R的Datasheet PDF文件第6页浏览型号M54HC133F1R的Datasheet PDF文件第7页 
M54HC133  
M74HC133  
13 INPUT NAND GATE  
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HIGH SPEED  
tPD = 13 ns (TYP.) at VCC = 5 V  
LOW POWER DISSIPATION  
ICC = 1 µA (MAX.) at TA = 25° C  
HIGH NOISE IMMUNITY  
VNIH = VNIL = 28 % VCC (MIN.)  
OUTPUT DRIVE CAPABILITY  
10 LSTTL LOADS  
SYMMETRICAL OutpuT IMPEDANCE  
|IOH| = IOL = 4 mA (MIN.)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
WIDE OPERATING VOLTAGE RANGE  
B1R  
(Plastic Package)  
F1R  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
VCC (OPR) = 2 V to 6 V  
PIN AND FUNCTION COMPATIBLE  
WITH 54/74LS133  
ORDER CODES :  
M54HC133F1R  
M74HC133B1R  
M74HC133M1R  
M74HC133C1R  
PIN CONNECTIONS (top view)  
DESCRIPTION  
The M54/74HC133 is a high speed CMOS 13-  
INPUT NAND GATE fabricated in silicon gate  
C2MOS technology. It has the same highspeed per-  
formance of LSTTL combined with true CMOS low  
power consumption.  
The internal circuit is composed of 7 stages includ-  
ing buffer output, which gives high noise immunity  
and stable output. All inputs are equipped with pro-  
tectioncircuits against static discharge and transient  
excess voltage.  
INPUT AND OUTPUT EQUIVALENT CIRCUIT  
NC =  
No Internal  
Connection  
October 1992  
1/10  

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