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M36LLR8860M1ZAQ PDF预览

M36LLR8860M1ZAQ

更新时间: 2024-02-12 19:37:36
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 静态存储器内存集成电路
页数 文件大小 规格书
18页 462K
描述
SPECIALTY MEMORY CIRCUIT, PBGA88, 8 X 10 MM, 0.8 MM PITCH, LFBGA-88

M36LLR8860M1ZAQ 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:BGA包装说明:8 X 10 MM, 0.8 MM PITCH, LFBGA-88
针数:88Reach Compliance Code:not_compliant
HTS代码:8542.32.00.71风险等级:5.92
其他特性:PSRAM ALSO ORGANIZED AS 4M X 16JESD-30 代码:R-PBGA-B88
JESD-609代码:e0长度:10 mm
内存密度:268435456 bit内存集成电路类型:MEMORY CIRCUIT
内存宽度:16混合内存类型:FLASH+PSRAM
功能数量:1端子数量:88
字数:16777216 words字数代码:16000000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-25 °C组织:16MX16
封装主体材料:PLASTIC/EPOXY封装代码:LFBGA
封装等效代码:BGA88,8X12,32封装形状:RECTANGULAR
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:1.8 V认证状态:Not Qualified
座面最大高度:1.4 mm最大待机电流:0.00011 A
子类别:Other Memory ICs最大压摆率:0.052 mA
最大供电电压 (Vsup):1.95 V最小供电电压 (Vsup):1.7 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:8 mm
Base Number Matches:1

M36LLR8860M1ZAQ 数据手册

 浏览型号M36LLR8860M1ZAQ的Datasheet PDF文件第2页浏览型号M36LLR8860M1ZAQ的Datasheet PDF文件第3页浏览型号M36LLR8860M1ZAQ的Datasheet PDF文件第4页浏览型号M36LLR8860M1ZAQ的Datasheet PDF文件第5页浏览型号M36LLR8860M1ZAQ的Datasheet PDF文件第6页浏览型号M36LLR8860M1ZAQ的Datasheet PDF文件第7页 
M36LLR8860T1, M36LLR8860D1  
M36LLR8860M1, M36LLR8860B1  
2 x 256 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory  
64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package  
FEATURES SUMMARY  
MULTI-CHIP PACKAGE  
Figure 1. Package  
2 dice of 256 Mbit (16Mb x16, Multiple  
Bank, Multi-level, Burst) Flash Memory  
1 die of 64 Mbit (4Mb x16) Pseudo SRAM  
SUPPLY VOLTAGE  
FBGA  
V
1.95V  
= V  
= V  
= V  
= 1.7 to  
DDQF  
DDF1  
DDF2  
CCP  
V
= 9V for fast program (12V tolerant)  
PP  
ELECTRONIC SIGNATURE  
Manufacturer Code: 20h  
LFBGA88 (ZAQ)  
8 x 10mm  
Top Configuration (Top + Top)  
M36LLR8860T1: 880Dh + 880Dh  
Mixed Configuration (Bottom + Top)  
M36LLR8860D1: 880Eh + 880Dh  
Mixed Configuration (Top + Bottom)  
M36LLR8860M1: 880Dh + 880Eh  
DUAL OPEATIONS  
proram/erase in one Bank while read in  
others  
Bottom Configuration (Bottom + Bottom)  
M36LLR8860B1: 880Eh + 880Eh  
No delay between read and write  
operations  
PACKAGE  
SECURITY  
Compliant with Lead-Free Soldering  
Processes  
Lead-Free Versions  
64 bit unique device number  
2112 bit user programmable OTP Cells  
FLASH MEMORY  
BLOCK LOCKING  
SYNCHRONOUS / ASYNCHRONOUS READ  
All blocks locked at power-up  
Any combination of blocks can be locked  
with zero latency  
Synchronous Burst Rad mode: 54MHz  
Asynchronous PaRead mode  
Random Acess: 85ns  
WP for Block Lock-Down  
F
Absolute Write Protection with V  
= V  
SS  
SYNCHRONOUS BURST READ SUSPEND  
PROGRAMMING TIME  
PPF  
PSRAM  
ACCESS TIME: 70ns  
ASYNCHRONOUS PAGE READ  
0µs typical Word program time using  
Buffer Enhanced Factory Program  
command  
Page Size: 16 words  
Subsequent read within page: 20ns  
MEMORY ORGANIZATION  
Multiple Bank Memory Array: 16 Mbit  
Banks  
Parameter Blocks (Top or Bottom  
location)  
LOW POWER FEATURES  
Temperature Compensated Refresh  
(TCR)  
Partial Array Refresh (PAR)  
Deep Power-Down (DPD) Mode  
COMMON FLASH INTERFACE (CFI)  
100,000 PROGRAM/ERASE CYCLES per  
BLOCK  
SYNCHRONOUS BURST READ/WRITE  
July 2005  
1/18  

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