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M36LLR8860B1ZAQF PDF预览

M36LLR8860B1ZAQF

更新时间: 2023-01-03 09:50:30
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
18页 462K
描述
SPECIALTY MEMORY CIRCUIT, PBGA88, 8 X 10 MM, 0.8 MM PITCH, ROHS COMPLIANT, LFBGA-88

M36LLR8860B1ZAQF 数据手册

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M36LLR8860T1, M36LLR8860D1  
M36LLR8860M1, M36LLR8860B1  
2 x 256 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory  
64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package  
FEATURES SUMMARY  
MULTI-CHIP PACKAGE  
Figure 1. Package  
2 dice of 256 Mbit (16Mb x16, Multiple  
Bank, Multi-level, Burst) Flash Memory  
1 die of 64 Mbit (4Mb x16) Pseudo SRAM  
SUPPLY VOLTAGE  
FBGA  
V
1.95V  
= V  
= V  
= V  
= 1.7 to  
DDQF  
DDF1  
DDF2  
CCP  
V
= 9V for fast program (12V tolerant)  
PP  
ELECTRONIC SIGNATURE  
Manufacturer Code: 20h  
LFBGA88 (ZAQ)  
8 x 10mm  
Top Configuration (Top + Top)  
M36LLR8860T1: 880Dh + 880Dh  
Mixed Configuration (Bottom + Top)  
M36LLR8860D1: 880Eh + 880Dh  
Mixed Configuration (Top + Bottom)  
M36LLR8860M1: 880Dh + 880Eh  
DUAL OPEATIONS  
proram/erase in one Bank while read in  
others  
Bottom Configuration (Bottom + Bottom)  
M36LLR8860B1: 880Eh + 880Eh  
No delay between read and write  
operations  
PACKAGE  
SECURITY  
Compliant with Lead-Free Soldering  
Processes  
Lead-Free Versions  
64 bit unique device number  
2112 bit user programmable OTP Cells  
FLASH MEMORY  
BLOCK LOCKING  
SYNCHRONOUS / ASYNCHRONOUS READ  
All blocks locked at power-up  
Any combination of blocks can be locked  
with zero latency  
Synchronous Burst Rad mode: 54MHz  
Asynchronous PaRead mode  
Random Acess: 85ns  
WP for Block Lock-Down  
F
Absolute Write Protection with V  
= V  
SS  
SYNCHRONOUS BURST READ SUSPEND  
PROGRAMMING TIME  
PPF  
PSRAM  
ACCESS TIME: 70ns  
ASYNCHRONOUS PAGE READ  
0µs typical Word program time using  
Buffer Enhanced Factory Program  
command  
Page Size: 16 words  
Subsequent read within page: 20ns  
MEMORY ORGANIZATION  
Multiple Bank Memory Array: 16 Mbit  
Banks  
Parameter Blocks (Top or Bottom  
location)  
LOW POWER FEATURES  
Temperature Compensated Refresh  
(TCR)  
Partial Array Refresh (PAR)  
Deep Power-Down (DPD) Mode  
COMMON FLASH INTERFACE (CFI)  
100,000 PROGRAM/ERASE CYCLES per  
BLOCK  
SYNCHRONOUS BURST READ/WRITE  
July 2005  
1/18  

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