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M27V801-200K1TR PDF预览

M27V801-200K1TR

更新时间: 2024-10-28 22:55:55
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 存储内存集成电路可编程只读存储器OTP只读存储器电动程控只读存储器
页数 文件大小 规格书
16页 110K
描述
8 Mbit 1Mb x8 Low Voltage UV EPROM and OTP EPROM

M27V801-200K1TR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFJ包装说明:PLASTIC, LCC-32
针数:32Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.92Is Samacsys:N
最长访问时间:200 nsI/O 类型:COMMON
JESD-30 代码:R-PQCC-J32JESD-609代码:e0
长度:13.995 mm内存密度:8388608 bit
内存集成电路类型:OTP ROM内存宽度:8
功能数量:1端子数量:32
字数:1048576 words字数代码:1000000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:1MX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC32,.5X.6
封装形状:RECTANGULAR封装形式:CHIP CARRIER
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 V认证状态:Not Qualified
座面最大高度:3.56 mm最大待机电流:0.00002 A
子类别:OTP ROMs最大压摆率:0.015 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:11.4554 mm
Base Number Matches:1

M27V801-200K1TR 数据手册

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M27V801  
8 Mbit (1Mb x8) Low Voltage UV EPROM and OTP EPROM  
LOW VOLTAGE READ OPERATION:  
3V to 3.6V  
FAST ACCESS TIME: 120ns  
LOW POWER CONSUMPTION:  
32  
32  
– Active Current 15mA at 5MHz  
– Standby Current 20µA  
1
1
PROGRAMMING VOLTAGE: 12.75V ± 0.25V  
FDIP32W (F)  
PDIP32 (B)  
PROGRAMMING TIME: 100µs/byte (typical)  
ELECTRONIC SIGNATURE  
– Manufacturer Code: 20h  
– Device Code: 42h  
DESCRIPTION  
The M27V801 is a low voltage 8 Mbit EPROM of-  
fered in the two ranges UV (ultra violet erase) and  
OTP (one time programmable). It is ideally suited  
for microprocessor systems requiring large data or  
program storage and is organized as 1,048,576 by  
8 bits.  
PLCC32 (K)  
TSOP32 (N)  
8 x 20 mm  
Figure 1. Logic Diagram  
The M27V801 operates in the read mode with a  
supply voltage as low as 3V. The decrease in op-  
erating power allows either a reduction of the size  
of the battery or an increase in the time between  
battery recharges.  
V
CC  
The FDIP32W (window ceramic frit-seal package)  
has transparent lid which allows the user to ex-  
pose the chip to ultraviolet light to erase the bit pat-  
tern. A new pattern can then be written to the  
device by following the programming procedure.  
20  
8
A0-A19  
E
Q0-Q7  
M27V801  
GV  
PP  
Table 1. Signal Names  
A0-A19  
Q0-Q7  
E
Address Inputs  
Data Outputs  
Chip Enable  
V
SS  
AI01902  
GV  
Output Enable / Program Supply  
Supply Voltage  
Ground  
PP  
V
CC  
V
SS  
May 1998  
1/16  

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